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HG-8002DC125.0000M-PCAVS PDF预览

HG-8002DC125.0000M-PCAVS

更新时间: 2024-11-13 07:34:55
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精工 - SEIKO /
页数 文件大小 规格书
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描述
Oscillator, 1MHz Min, 125MHz Max, 125MHz Nom, CMOS

HG-8002DC125.0000M-PCAVS 数据手册

  
Crystal oscillator  
PROGRAMMABLE HIGH-STABILITY HIGH-FREQUENCY CRYSTAL OSCILLATOR  
HG-8002JA/DC series  
Product number (please refer to page 2)  
Q3502 JAxxx xxx 00  
Q3402DCxxx xxx 00  
• Wide frequency output by PLL technology.  
Low current consumption by output enable function (OE) or standby function (ST)  
HG-8002JA  
HG-8002DC  
• Pin compatible with half-size oscillator SG-531.  
• Package and pin compatible with SG-615.  
• Low current consumption due to CMOS technology.  
• Excellent environmental capability.  
Actual size  
Specifications 2  
PH/SH  
Remarks  
Symbol  
Item  
PT/ST  
PC/SC  
±0.165  
f0  
1.0000 MHz to 125.0000 MHz  
-0.5 V to +7.0 V  
Refer to page 33. "Frequency range"  
Output frequency range  
VDD-GND  
Max. supply voltage  
Operating voltage  
Storage temperature  
Operating temperature  
Power source  
voltage  
VDD  
TSTG  
TOPR  
f/f0  
5.0  
V
±0.25  
-55 °C to +125 °C  
-20 °C to +70 °C (-40 °C to +85 °C  
V
3.3  
V
V
Stored as bare product after unpacking  
Refer to page 33."Frequency range"  
Temperature  
range  
)
-6  
-6  
-6  
AV,BV: -20 °C to +70 °C, CX: -40 °C to +85 °C  
AV: ±20 x 10 BV: ±25 x 10 CX: ± 30 x 10  
Frequency stability  
Iop  
IOE  
IST  
45 mA Max.  
30 mA Max.  
28 mA Max.  
16 mA Max.  
No load condition, Max. frequency range  
OE=GND(PT, PH, PC)  
ST=GND(ST, SH, SC)  
Current consumption  
Output disable current  
Standby current  
50 µA Max.  
40 % to 60 %  
40 % to 60 %  
CMOS load: 1/2VDD level, Max. load condition  
TTL load: 1.4 V level, Max. load condition  
tw/ t  
Duty  
1  
V
DD -0.4 V Min.  
VOH  
VOL  
N
I
OH=-16 mA(PT /ST, PH/SH),-8 mA(PC/SC)  
High output voltage  
Low output voltage  
Output load 1  
condition (fan out)  
0.4 V Max.  
I
OL= 16 mA(PT /ST, PH/SH), 8 mA(PC/SC)  
2 TTL Max.  
TTL  
CMOS  
Max. frequency and Max. operating voltage range  
15 pF Max.  
CL  
_
2.0 V Min.  
0.8 V Max.  
0.7 x VDD Min.  
0.2 x VDD Max.  
VIH  
VIL  
Output enable/disable input voltage  
ST, OE terminal  
3 ns Max.  
CMOS load: 20 %80  
TTL load: 0.4 V 2.4 V level  
CMOS load: 80 %20 DD level  
TTL load: 2.4 V 0.4 V level  
% VDD level  
CMOS level  
Output rise time 1  
tTLH  
tTHL  
4 ns Max.  
4 ns Max.  
TTL level  
3 ns Max.  
%
V
CMOS level  
Output fall time 1  
TTL level  
10 ms Max.  
tOSC  
Time at minimum operating voltage to be 0 s  
Oscillation start up time  
Aging  
-6  
±2 x 10 /year Max.  
fa  
Ta= +25 °C, VDD = 5.0 V/3.3 V(PC/SC)  
Three drops on a hard board from 750 mm or  
-6  
±2 x 10 Max.  
2
excitation test with 29400 m/s x 0.3 ms x  
S.R.  
Shock resistance  
1/2sine wave in 3 directions  
1 Operating temperature(-40 °C to +85 °C), the available frequency, duty and output load conditions, please refer to page 33.  
2 PLL - PLL connection & Jitter specification, please refer to page 53, 54.  
Checking possible by the Frequency Checking Program.  
(Unit: mm)  
(Unit: mm)  
1.3  
13.7 Max.  
No.  
1
Pin terminal  
# 4  
# 3  
# 8  
#5  
OE or ST  
GND  
No.  
1
Pin terminal  
2
OE or ST  
GND  
3
OUT  
2
4
VDD  
3
OUT  
4
VDD  
# 1  
# 4  
# 1  
# 2  
7.62  
14.0 Max.  
90° to  
105°  
0.25  
0.51  
7.62  
0.51  
5.08  
7.62  
5.08  
Note.  
OE Pin (PT, PH, PC)  
OE pin - "H" or "open" : Specified frequency output.  
OE pin - "L" : Output is high impedance.  
ST pin (ST, SH, SC)  
ST pin - "H" or "open" : Specified frequency output.  
ST pin - "L" : Output is low level (weak pull - down), oscillation stops.  
62  

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