Datasheet > HEF4541BT-Q100Y

HEF4541BT-Q100Y

更新时间： 2024-09-25 21:14:35

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
17页	544K
描述
HEF4541B-Q100 - Programmable timer SOIC 14-Pin

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HEF4541BT-Q100Y 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
零件包装代码：	SOIC	针数：	14
Reach Compliance Code：	compliant	风险等级：	5.75
Base Number Matches：	1

HEF4541BT-Q100Y 数据手册

HEF4541B-Q100

Programmable timer

Rev. 2 — 31 December 2013

Product data sheet

1. General description

The HEF4541B-Q100 is a programmable timer. It consists of a 16-stage binary counter,

an integrated oscillator to be used with external timing components, an automatic

power-on reset and output control logic. The external components R_TCand C_TC

determines the frequency of the oscillator within the frequency range 1 Hz to 100 kHz. An

external clock signal at input RS can replace the oscillator. The timer advances on the

positive-going transition of RS. A LOW on the auto reset input (AR) and a LOW on the

master reset input (MR) enables the internal power-on reset. A HIGH level at input MR

resets the counter independent on all other inputs. Resetting, disables the oscillator to

provide no active power dissipation.

A HIGH at input AR turns off the power-on reset to provide a low quiescent power

dissipation of the timer. The 16-stage counter divides the oscillator frequency by 2⁸, 2¹⁰,

2¹³or 2¹⁶depending on the state of the address inputs (A0, A1). The divided oscillator

frequency is available at output O. The phase input (PH) features a complementary output

signal. When the mode select input (MODE) is LOW the timer is a single transition timer

and when HIGH the timer is a 2ⁿfrequency divider.

It operates over a recommended V_DDpower supply range of 3 V to 15 V referenced to V_SS

(usually ground). Unused inputs must be connected to V_DD, V_SS, or another input.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Fully static operation

 5 V, 10 V, and 15 V parametric ratings

 Standardized symmetrical output characteristics

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Complies with JEDEC standard JESD 13-B

12 3 4 5 6 7...17

中文翻译

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与HEF4541BT-Q100Y相关器件

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HEF4543B	NXP	获取价格	BCD to 7-segment latch/decoder/driver
HEF4543B_09	NXP	获取价格	BCD to 7-segment latch/decoder/driver
HEF4543BD	NXP	获取价格	BCD to 7-segment latch/decoder/driver
HEF4543BDF	NXP	获取价格	IC 4000/14000/40000 SERIES, SEVEN SEGMENT DECODER/DRIVER, CONFIGURABLE OUTPUT, CDIP16, SOT
HEF4543BF	NXP	获取价格	BCD to 7-segment latch/decoder/driver
HEF4543BN	NXP	获取价格	BCD to 7-segment latch/decoder/driver
HEF4543BP	NXP	获取价格	BCD to 7-segment latch/decoder/driver
HEF4543BPB	NXP	获取价格	暂无描述
HEF4543BPN	ETC	获取价格	LCD Display Driver
HEF4543BT	NXP	获取价格	BCD to 7-segment latch/decoder/driver

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