HDAS-524, HDAS-528
12-Bit, 400kHz, Complete
Data Acquisition System
FEATURES
ꢀ
12-Bit resolution, 400kHz throughput
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8 Channels single-ended or 4 channels
differential
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ꢀ
ꢀ
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Miniature, 40-pin, ceramic DDIP
Full scale input range from 100mV to 10V
Three-state outputs
INPUT/OUTPUT CONNECTIONS
No missing codes
PIN FUNCTION
PIN FUNCTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
CH0/CH0 HI
CH1/CH1 HI
CH2/CH2 HI
CH3/CH3 HI
CH7/CH3 LO
CH6/CH2 LO
CH5/CH1 LO
CH4/CH0 LO
COMP BIN
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
START CONVERT
CA2
CA1
CA0
+5V SUPPLY
DIGITAL GROUND
ENABLE
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
GENERAL DESCRIPTION
The HDAS-524 and HDAS-528 are complete data acquisition systems. Each
contains an internal multiplexer, instrumentation amplifier, sample-hold,
analog-to-digital converter and three-state outputs. Packaged in miniature,
40-pin, double-dip packages, the HDAS-524/528 have a low power dissipation
of 2.6 Watts.
The HDAS-524 provides 4 differential inputs, and the HDAS-528 provides
8 single-ended inputs. An internal instrumenta- tion amplifier is characterized
for gains of 1, 2, 4, 8, 10 and 100. The gain range is selectable through a
single external resistor.
RGAIN LO
RGAIN HI
S/H OUT
HDAS-524/528 OPERATION
+10V REFERENCE OUT
SIGNAL GROUND
GAIN ADJUST
OFFSET ADJUST
BIPOLAR
–15V SUPPLY
ANALOG GROUND
+15V SUPPLY
The HDAS devices accept either 8 single-ended or 4 differential input signals.
Tie unused channels to SIGNAL GROUND, pin 14. Channel selection is
accomplished using the multiplexer address pins as shown in Table 1. Obtain
additional channels by connecting external multiplexers.
BIT 11
BIT 12 (LSB)
EOC
The acquisition time is the amount of time the multiplexer, instrumentation
amplifier and sample-hold require to settle within a specified range of accu-
racy. The acquisition time can be measured by how long EOC is low before
the rising edge of the START CONVERT pulse for continuous operation. Higher
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ꢀꢉ ꢀꢁ
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ꢕꢄꢖꢃꢕꢄꢖꢅꢄꢗꢅꢅꢀꢅꢅꢅ
ꢘꢉꢅꢅꢅꢜꢗꢈꢅꢉꢅꢅ
ꢘꢀꢅꢅꢅꢜꢗꢈꢅꢘꢅꢅ
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ꢉꢝꢅꢅꢅꢜꢗꢈꢅꢁꢅꢅ
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ꢉꢅꢎꢅꢋꢏꢀꢅ
ꢄꢐꢑꢂꢒꢁꢉꢋꢅ
ꢕꢄꢉꢃꢕꢄꢉꢅꢄꢗꢅꢅꢘꢅꢅ
ꢕꢄꢘꢃꢕꢄꢘꢅꢄꢗꢅꢅꢋꢅꢅ
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ꢕꢄꢁꢃꢕꢄꢀꢅꢙꢆꢅꢅꢚꢅꢅ
ꢕꢄꢛꢃꢕꢄꢉꢅꢙꢆꢅꢅꢛꢅꢅ
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ꢅꢅ
ꢓꢇꢔꢅ
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ꢗꢃꢑꢅ
ꢂꢃꢄꢅ
ꢊꢁꢉꢋꢌꢅ
ꢊꢁꢉꢍꢌꢅ
ꢍꢏꢀꢅ
ꢀꢉꢒꢜꢗꢈꢅꢅ
ꢑꢃꢐꢅ
ꢘꢅꢂꢈꢑꢈꢞꢅ
ꢆꢇꢈꢟꢇꢈ
ꢄꢐꢑꢂꢒꢁꢉꢍ
ꢉꢚꢅꢅꢅꢜꢗꢈꢅꢚꢅꢅ
ꢉꢛꢅꢅꢅꢜꢗꢈꢅꢍꢅꢅ
ꢉꢁꢅꢅꢅꢜꢗꢈꢅꢝꢅꢅ
ꢉꢋꢅꢅꢅꢜꢗꢈꢅꢀꢖꢅ
ꢉꢘꢅꢅꢅꢜꢗꢈꢅꢀꢀꢅ
ꢂꢗꢠꢡꢑꢙꢅꢠꢢꢆꢇꢡꢐꢅꢀꢋ
ꢉꢉꢅꢅꢅꢜꢗꢈꢅꢀꢉꢅꢊꢙꢂꢜꢌꢅ
ꢘꢍ ꢘꢚ
ꢀꢍ
ꢀꢘ
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ꢘꢋꢅ
ꢘꢝ
ꢀꢝ
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Typical topology is shown.
Figure 1. Functional Block Diagram
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MDC_HDAS-524/528.B01 Page 1 of 5