HD74LVCZ16240AT-EL

更新时间： 2024-12-01 13:02:03

品牌	Logo	应用领域
瑞萨 - RENESAS		驱动器
页数	文件大小	规格书
9页	102K
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HD74LVCZ16240AT-EL 数据手册

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HD74LVCZ16240A

16–bit Buffers / Line Drivers with 3–state Outputs

REJ03D0373–0200

(Previous ADE-205-231 (Z))

Rev.2.00

Aug. 19, 2004

Description

The HD74LVCZ16240A has sixteen inverter drivers with three state outputs in a 48 pin package. This device is a

inverting buffer and has four active low enables (1G to 4G). Each enable independently controls four buffers.

When V_CCis between 0 and 1.5 V, the device is in the high impedance state during power up or power down.

Low voltage and high-speed operation is suitable at battery drive product (note type personal computer) and low power

consumption extends the life of a battery for long time operation.

Features

•

V_CC= 2.7 to 5.5 V

All inputs V_IH(Max) = 5.5 V (@V_CC= 0 to 5.5 V)

All outputs V_O(Max) = 5.5 V (@V_CC= 0 V or output off state)

Typical V_OLground bounce < 0.8 V (@V_CC= 3.3 V, Ta = 25°C)

Typical V_OHundershoot > 2.0 V (@V_CC= 3.3 V, Ta = 25°C)

High impedance state during power up and power down

Power off disables outputs, permitting live insertion

High output current ±24 mA (@V_CC= 3.0 to 5.5 V)

Ordering Information

Part Name

Package Type

Package Code

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LVCZ16240ATEL

TSSOP–48 pin

TTP–48DBV

EL (1,000 pcs/reel)

Function Table

Inputs

Output Y

H: High level

L: Low level

X: Immaterial

Z: High impedance

Rev.2.00 Aug. 19, 2004 page 1 of 8

12 3 4 5 6 7...9

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