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HD74LVCZ240AFP-EL PDF预览

HD74LVCZ240AFP-EL

更新时间: 2024-12-01 13:08:19
品牌 Logo 应用领域
日立 - HITACHI 驱动器
页数 文件大小 规格书
11页 58K
描述
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HD74LVCZ240AFP-EL 数据手册

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HD74LVCZ240A  
Octal Buffers / Line Drivers with 3–state Outputs  
ADE-205-229A (Z)  
2nd. Edition  
February 1999  
Description  
The HD74LVCZ240A has eight inverter drivers with three state outputs in a 20 pin package. This device is  
a inverting buffer and has two active low enables (1G and 2G). Each enable independently controls four  
buffers.  
When VCC is between 0 and 1.5 V, the device is in the high impedance state during power up or power  
down.  
Low voltage and high speed operation is suitable at battery drive product (note type personal computer) and  
low power consumption extends the life of a battery for long time operation.  
Features  
VCC = 2.7 to 5.5 V  
All inputs VIH (Max) = 5.5 V (@VCC = 0 to 5.5 V)  
All outputs VO (Max) = 5.5 V (@VCC = 0 V or output off state)  
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)  
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)  
High impedance state during power up and power down  
Power off disables outputs, permitting live insertion  
High output current ±24 mA (@VCC = 3.0 to 5.5 V)  

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