HD74LV595ATELL-E

更新时间： 2024-11-16 13:08:19

品牌	Logo	应用领域
瑞萨 - RENESAS		移位寄存器
页数	文件大小	规格书
14页	109K
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HD74LV595ATELL-E 数据手册

HD74LV595A

8-bit Shift Registers with 3-state Outputs

REJ03D0335–0200Z

(Previous ADE-205-281 (Z))

Rev.2.00

Jun. 28, 2004

Description

This device each contains an 8-bit serial-in, parallel-out shift registers that feeds an 8-bit D-type storage register. The

storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage

Both the shift register and the storage register clocks are positive-edge triggered. If the user wishes to connect both

clocks together, the shift register state will always be one clock pulse ahead of the storage register. Low-voltage and

high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power

consumption extends the battery life.

Features

•

V_CC= 2.0 V to 5.5 V operation

All inputs V_IH(Max.) = 5.5 V (@V_CC= 0 V to 5.5 V)

All outputs V_O(Max.) = 5.5 V (@V_CC= 0 V)

Typical V_OLground bounce < 0.8 V (@V_CC= 3.3 V, Ta = 25°C)

Typical V_OHundershoot > 2.3 V (@V_CC= 3.3 V, Ta = 25°C)

Output current ±6 mA (@V_CC= 3.0 V to 3.6 V), ±12 mA (@V_CC= 4.5 V to 5.5 V)

Ordering Information

Part Name

Package Type

Package Code

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LV595AFPEL

HD74LV595ARPEL

HD74LV595ATELL

SOP–16 pin (JEITA)

SOP–16 pin (JEDEC)

TSSOP–16 pin

FP–16DAV

FP–16DNV

TTP–16DAV

EL (2,000 pcs/reel)

EL (2,500 pcs/reel)

ELL (2,000 pcs/reel)

Note: Please consult the sales office for the above package availability.

Function Table

Inputs

Function

SER

SRCLK

SRCLR

RCLK

↑

Force outputs into high-impedance state

Enable parallel output

Reset shift register

Shift data into shift register

↑

Shift data into shift register

↓

Shift register remains unchanged

Transfer shift register contents to latch register

Latch register remains unchanged

↓

Note: H: High level

L: Low level

X: Immaterial

↑: Low to high transition

↓: High to low transition

Rev.2.00 Jun. 28, 2004 page 1 of 13

12 3 4 5 6 7...14

中文翻译

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与HD74LV595ATELL-E相关器件

型号	品牌	获取价格	描述	数据表
HD74LV74A	RENESAS	获取价格	Dual D-type Flip Flops with Preset and Clear
HD74LV74A	HITACHI	获取价格	Dual D-type Flip Flops with Preset and Clear
HD74LV74AFP	HITACHI	获取价格	D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary O
HD74LV74AFP-E	RENESAS	获取价格	LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO
HD74LV74AFPEL	RENESAS	获取价格	Dual D-type Flip Flops with Preset and Clear
HD74LV74AFPEL-E	RENESAS	获取价格	LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO
HD74LV74ARP	ETC	获取价格	FLIP-FLOP\|DUAL\|D TYPE\|LV-CMOS\|SOP\|14PIN\|PLASTIC
HD74LV74ARPEL	RENESAS	获取价格	Dual D-type Flip Flops with Preset and Clear
HD74LV74AT	ETC	获取价格	FLIP-FLOP\|DUAL\|D TYPE\|LV-CMOS\|TSSOP\|14PIN\|PLASTIC
HD74LV74ATELL	RENESAS	获取价格	Dual D-type Flip Flops with Preset and Clear

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