HD74LV74A

更新时间： 2024-11-16 05:10:59

品牌	Logo	应用领域
瑞萨 - RENESAS		触发器
页数	文件大小	规格书
10页	83K
描述
Dual D-type Flip Flops with Preset and Clear

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

HD74LV74A 数据手册

HD74LV74A

Dual D–type Flip Flops with Preset and Clear

REJ03D0312–0300Z

(Previous ADE-205-244A (Z))

Rev.3.00

Jun. 02, 2004

Description

The HD74LV74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin package. The input

data is transferred to the output at the rising edge of clock pulse CLK. Low-voltage and high-speed operation is

suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the

battery life.

Features

•

V_CC= 2.0 V to 5.5 V operation

All inputs V_IH(Max.) = 5.5 V (@V_CC= 0 V to 5.5 V)

All outputs V_O(Max.) = 5.5 V (@V_CC= 0 V)

Typical V_OLground bounce < 0.8 V (@V_CC= 3.3 V, Ta = 25°C)

Typical V_OHundershoot > 2.3 V (@V_CC= 3.3 V, Ta = 25°C)

Output current ±6 mA (@V_CC= 3.0 V to 3.6 V), ±12 mA (@V_CC= 4.5 V to 5.5 V)

Ordering Information

Part Name

Package Type

Package Code

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LV74AFPEL

HD74LV74ARPEL

HD74LV74ATELL

SOP–14 pin(JEITA)

SOP–14 pin(JEDEC)

TSSOP–14 pin

FP–14DAV

FP–14DNV

TTP–14DV

EL (2,000 pcs/reel)

EL (2,500 pcs/reel)

ELL (2,000 pcs/reel)

Note: Please consult the sales office for the above package availability.

Function Table

Inputs

Outputs

PRE

CLR

CLK

H*¹

↑

↓

Q₀

Note: H: High level

L: Low level

X: Immaterial

↑: Low to high transition

↓: High to low transition

Q₀: The level of Q immediately before the input conditions shown in the above table is determined.

1.: Q and Q will remain HIGH as long as Preset and Clear are Low, but Q and Q are unpredictable, if Preset

and Clear go HIGH simultaneously.

Rev.3.00 Jun. 02, 2004 page 1 of 9

12 3 4 5 6 7...10

中文翻译

下载PDF

与HD74LV74A相关器件

型号	品牌	获取价格	描述	数据表
HD74LV74AFP	HITACHI	获取价格	D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary O
HD74LV74AFP-E	RENESAS	获取价格	LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO
HD74LV74AFPEL	RENESAS	获取价格	Dual D-type Flip Flops with Preset and Clear
HD74LV74AFPEL-E	RENESAS	获取价格	LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO
HD74LV74ARP	ETC	获取价格	FLIP-FLOP\|DUAL\|D TYPE\|LV-CMOS\|SOP\|14PIN\|PLASTIC
HD74LV74ARPEL	RENESAS	获取价格	Dual D-type Flip Flops with Preset and Clear
HD74LV74AT	ETC	获取价格	FLIP-FLOP\|DUAL\|D TYPE\|LV-CMOS\|TSSOP\|14PIN\|PLASTIC
HD74LV74ATELL	RENESAS	获取价格	Dual D-type Flip Flops with Preset and Clear
HD74LV74ATELL-E	RENESAS	获取价格	暂无描述
HD74LV74FP	RENESAS	获取价格	D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary O