是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | DFP, FL16,.3 | Reach Compliance Code: | not_compliant |
风险等级: | 5.68 | JESD-30 代码: | R-XDFP-F16 |
JESD-609代码: | e0 | 负载电容(CL): | 50 pF |
逻辑集成电路类型: | J-K FLIP-FLOP | 最大I(ol): | 0.00005 A |
功能数量: | 2 | 端子数量: | 16 |
最高工作温度: | 125 °C | 最低工作温度: | -55 °C |
封装主体材料: | CERAMIC | 封装代码: | DFP |
封装等效代码: | FL16,.3 | 封装形状: | RECTANGULAR |
封装形式: | FLATPACK | 电源: | 5 V |
Prop。Delay @ Nom-Sup: | 44 ns | 认证状态: | Not Qualified |
筛选级别: | 38535V;38534K;883S | 子类别: | FF/Latches |
标称供电电压 (Vsup): | 5 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | MILITARY |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | FLAT |
端子节距: | 1.27 mm | 端子位置: | DUAL |
总剂量: | 1M Rad(Si) V | 触发器类型: | POSITIVE EDGE |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
HCTS109KMSR | INTERSIL |
获取价格 |
Radiation Hardened Dual JK Flip Flop | |
HCTS109KTR | INTERSIL |
获取价格 |
Radiation Hardened Dual JK Flip Flop | |
HCTS109MS | INTERSIL |
获取价格 |
Radiation Hardened Dual JK Flip Flop | |
HCTS109T | INTERSIL |
获取价格 |
Radiation Hardened Dual JK Flip Flop | |
HCTS10D | INTERSIL |
获取价格 |
Radiation Hardened Triple 3-Input NAND Gate | |
HCTS10DMSR | INTERSIL |
获取价格 |
Radiation Hardened Triple 3-Input NAND Gate | |
HCTS10HMSR | INTERSIL |
获取价格 |
Radiation Hardened Triple 3-Input NAND Gate | |
HCTS10K | INTERSIL |
获取价格 |
Radiation Hardened Triple 3-Input NAND Gate | |
HCTS10K/SAMPLE | RENESAS |
获取价格 |
HCT SERIES, TRIPLE 3-INPUT NAND GATE, CDFP14, CERAMIC, DFP-14 | |
HCTS10KMSR | INTERSIL |
获取价格 |
Radiation Hardened Triple 3-Input NAND Gate |