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HCS161KMSR

更新时间： 2024-11-20 22:09:59
品牌 Logo 应用领域
英特矽尔 - INTERSIL 计数器触发器逻辑集成电路
页数 文件大小 规格书
9页 130K
描述
Radiation Hardened Synchronous Counter

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HCS161KMSR 数据手册

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HCS161MS  
Radiation Hardened  
Synchronous Counter  
September 1995  
Features  
Pinouts  
• 3 Micron Radiation Hardened SOS CMOS  
16 LEAD CERAMIC DUAL-IN-LINE  
METAL SEAL PACKAGE (SBDIP)  
MIL-STD-1835 CDIP2-T16  
TOP VIEW  
• Total Dose 200K RAD (Si)  
• SEP Effective LET No Upsets: >100 MEV-cm2/mg  
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-  
Day (Typ)  
VCC  
TC  
MR  
CP  
P0  
16  
15  
14  
13  
1
2
3
4
5
6
7
8
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s  
Q0  
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse  
• Cosmic Ray Upset Immunity 2 x 10-9 Error/Bit Day (Typ)  
• Latch-Up Free Under Any Conditions  
• Military Temperature Range: -55oC to +125oC  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
• Input Logic Levels  
P1  
Q1  
P2  
12 Q2  
Q3  
P3  
11  
10 TE  
SPEN  
PE  
GND  
9
- VIL = 0.3 VCC Max  
- VIH = 0.7 VCC Min  
16 LEAD CERAMIC METAL SEAL  
FLATPACK PACKAGE (FLATPACK)  
MIL-STD-1835 CDFP4-F16  
TOP VIEW  
• Input Current Levels Ii ≤ 5µA at VOL, VOH  
Description  
VCC  
TC  
MR  
CP  
P0  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
The Intersil HCS161MS is a Radiation Hardened 4-Input Binary;  
synchronous counter featuring asynchronous reset and look-  
ahead carry logic. The HCS161 has an active-low master reset to  
zero, MR. A low level at the synchronous parallel enable, SPE,  
disables counting and allows data at the preset inputs (p0 - p3) to  
load the counter. The data is latched to the outputs on the posi-  
tive edge of the clock input, CP. The HCS161MS has two count  
output, IC. The terminal count output indicates a maximum count  
for one clock pulse and is used to enable the next cascaded  
stage to count.  
Q0  
Q1  
P1  
Q2  
P2  
Q3  
P3  
TE  
PE  
SPE  
GND  
The HCS161MS utilizes advanced CMOS/SOS technology to  
achieve high-speed operation. This device is a member of  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
The HCS161MS is supplied in a 16 lead Ceramic flatpack  
(K suffix) or a SBDIP Package (D suffix).  
Ordering Information  
PART NUMBER  
HCS161DMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
Intersil Class S Equivalent  
Intersil Class S Equivalent  
Sample  
PACKAGE  
o
o
-55 C to +125 C  
16 Lead SBDIP  
o
o
HCS161KMSR  
-55 C to +125 C  
16 Lead Ceramic Flatpack  
16 Lead SBDIP  
o
HCS161D/Sample  
HCS161K/Sample  
HCS161HMSR  
+25 C  
o
+25 C  
Sample  
16 Lead Ceramic Flatpack  
Die  
o
+25 C  
Die  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518755  
File Number 2469.2  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
193  
1234567...9

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HCS163KMSR INTERSIL

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