Metal Package Full Size DIP and Half DIP, TTL / HC-MOS
HCOF/HCOH Series
HCOF Package
20.7
4
3
Product Features:
Low Jitter, Non-PLL Based Output
CMOS/TTL Compatible Logic Levels
Compatible with Leadfree Processing
Applications:
Fibre Channel
Server & Storage
Sonet /SDH
12.6
1
2
802.11 / Wifi
7.62
T1/E1, T3/E3
System Clock
Frequency
1 MHz to 160.000 MHz
15.24
Output Level
HC-MOS
TTL
5.1 Max.
6 Min.
0.048
‘0’ = 0.1 Vcc Max., ‘1’ = 0.9 Vcc Min.
‘0’ = 0.4 VDC Max., ‘1’ = 2.4 VDC Min.
Specify 50% ±10% or ±5% See Table in Part Number Guide
Duty Cycle
Rise / Fall Time
Output Load
5 nS Max. @ Vcc = +3.3 VDC, 10 nS Max. @ Vcc = +5 VDC ***
0.36
Fo < 50 MHz = 10 TTL, Fo > 50 MHz = 5 LSTTL See Table in Part
Number Guide
HCOH Package
12.6
Frequency Stability
Start-up Time
See Frequency Stability Table (Includes room temperature tolerance and
stability over operating temperature)
10 mS Max.
4
3
12.6
Enable / Disable
Time
100 nS Max.
1
2
Supply Voltage
See Input Voltage Table, tolerance ±5 %
40 mA Max. @ 3.3 VDC, 85 mA Max. @ 5.0 VDC ***
See Operating Temperature Table in Part Number Guide
-55 C to +125 C
7.62
Current
Operating
Storage
7.62
6 Min.
5.1 Max.
Jitter:
RMS(1sigma)
1 MHz-75 MHz
76 MHz-160 MHz
Max Integrated
1 MHz-75 MHz
76 MHz-160 MHz
Max Total Jitter
1 MHz-75 MHz
76 MHz-160 MHz
5 pS RMS (1 sigma) Max. accumulated jitter (20K adjacent periods)
3 pS RMS (1 sigma) Max. accumulated jitter (20K adjacent periods)
0.48
0.36
1.5 pS RMS (1 sigma -12KHz to 20MHz)
1 pS RMS (1 sigma -12KHz to 20MHz)
Dimension Units: mm
Pin Connection
50 pS p-p (100K adjacent periods)
30 pS p-p (100K adjacent periods)
1
2
3
4
Enable / N.C.
GND
Output
Vcc
Part Number Guide
Sample Part Number:
HCOF - 3153BH - 20.000
Package
Input
Operating
Symmetry
(Duty Cycle)
5 = 45 / 55 Max.
6 = 40 / 60 Max.
Output
Stability
(in ppm)
**E = 10
**D = 15
**F = 20
A = 25
Enable /
Disable
Frequency
Voltage
5 = 5.0 V
3 = 3.3 V
Temperature
1 = 0 C to +70 C
6 = -10 C to +70 C
3 = -20 C to +70 C
4 = -30 C to +75 C
2 = -40 C to +85 C
1 = 10TTL / 15 pF HC-MOS
3 = 15 pF HC-MOS
H = Enable
O = N/C
HCOF -
HCOH -
6 = 30 pF
- 20.000 MHz
5 = 50 pF HC-MOS (<40 MHz)
B = 50
C = 100
NOTE: A 0.01 µF bypass capacitor is recommended between Vcc (pin 4) and GND (pin 2) to minimize power supply noise.
* Not available at all frequencies. ** Not available for all temperature ranges. *** Frequency, supply, and load related parameters.
ILSI America Phone: 775-851-8880 • Fax: 775-851-8882• e-mail: e-mail@ilsiamerica.com • www.ilsiamerica.com
12/10_A
Specifications subject to change without notice
Page 1