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HCF4514BF PDF预览

HCF4514BF

更新时间: 2024-11-05 22:55:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 锁存器
页数 文件大小 规格书
11页 263K
描述
4-BIT LATCH/4-TO-16 LINE DECODER

HCF4514BF 数据手册

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HCC/HCF4514B  
HCC/HCF4515B  
4-BIT LATCH/4-TO-16 LINE DECODER  
HCC/HCF4514B OUTPUT ”HIGH” ON SELECT  
HCC/HCF4515B OUTPUT ”LOW” ON SELECT  
.
QUIESCENT CURRENT SPECIFIED TO 20V  
FOR HCC DEVICE  
STROBED INPUT LATCH  
INHIBIT CONTROL  
INPUT CURRENT OF 100nA AT 18V AND 25°C  
FOR HCC DEVICE  
100% TESTED FOR QUIESCENT CURRENT  
MEETS ALLREQUIREMENTS OF JEDECTEN-  
TATIVE STANDARD N0. 13A, ”STANDARD  
SPECIFICATIONS FOR DESCRIPTION OF ”B”  
SERIES CMOS DEVICES”  
.
.
.
F
EY  
(Ceramic Frit Seal Package)  
(Plastic Package)  
.
.
M1  
(Micro Package)  
ORDER CODES :  
HCC45XXBF  
HCF45XXBEY  
HCF45XXBM1  
PIN CONNECTIONS  
DESCRIPTION  
TheHCC4514B/HCC4515B (extended temperature  
range) and theHCF4514B/HCF4515B (intermediate  
temperature range) are monolithic integrated circuits  
available in 24-lead dual in-line plastic or ceramic  
package and plastic micro package. The  
HCC/HCF4514B/4515B consisting of a 4-bit strobed  
latch and a 4 to 16 line decoder. The latches hold the  
last input data presented prior to the strobe transition  
from 1 to 0. Inhibit control allows all outputs to be  
placed at0 (HCC/HCF4514B)or1(HCC/HCF4515B)  
regardless of thestateofthedata orstrobeinputs.The  
decode truth table indicates all combinations of data  
inputs and appropriate selected outputs.  
June 1989  
1/11  

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