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HCF4076BE PDF预览

HCF4076BE

更新时间: 2024-11-20 12:58:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
9页 217K
描述
D FLIP-FLOP

HCF4076BE 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.86JESD-30 代码:R-PDIP-T16
JESD-609代码:e0负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:3000000 Hz
功能数量:4端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:3/15 V认证状态:Not Qualified
子类别:FF/Latches表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
触发器类型:POSITIVE EDGEBase Number Matches:1

HCF4076BE 数据手册

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HCF4076B  
4 BIT D TYPE REGISTERS  
THREE STATE OUTPUTS  
INPUT DISABLE WITHOUT GATING THE  
CLOCK  
GATED OUTPUT CONTROL LINES FOR  
ENABLING OR DISABLING THE OUTPUTS  
BUFFERED INPUTS AND OUTPUTS  
QUIESCENT CURRENT SPECIFIED UP TO  
20V  
DIP  
SOP  
5V, 10V AND 15V PARAMETRIC RATINGS  
INPUT LEAKAGE CURRENT  
ORDER CODES  
PACKAGE  
I = 100nA (MAX) AT V = 18V T = 25°C  
I
DD  
A
TUBE  
T & R  
100% TESTED FOR QUIESCENT CURRENT  
DIP  
HCF4076BEY  
HCF4076BM1  
MEETS ALL REQUIREMENTS OF JEDEC  
JESD13B "STANDARD SPECIFICATIONS  
FOR DESCRIPTION OF B SERIES CMOS  
DEVICES"  
SOP  
HCF4076M013TR  
Disable inputs are low, data at the D inputs are  
loaded into their respective flip-flops on the next  
positive transition of the clock input. Output  
Disable inputs are also provided. When the Output  
Disable inputs are both low, the normal logic  
states of the four outputs are available to the load.  
The outputs are disabled independently of the  
clock by a high logic level at either Output Disable  
input, and present a high impedance.  
DESCRIPTION  
HCF4076B is a monolithic integrated circuit  
fabricated in Metal Oxide Semiconductor  
technology available in DIP and SOP packages.  
HCF4076B is a four bit register consisting of  
D-TYPE flip-flops that feature three state outputs.  
Data Disable inputs are provided to control the  
entry of data into the flip-flops. When both Data  
PIN CONNECTION  
September 2002  
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