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HC74Q

更新时间： 2024-11-11 11:01:55
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德州仪器 - TI 触发器
页数 文件大小 规格书
9页 213K
描述
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND

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中文翻译

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HC74Q 数据手册

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SCLS577 − MARCH 2004  
D OR PW PACKAGE  
(TOP VIEW)  
D
Qualification in Accordance With  
AEC-Q100  
†
D
Qualified for Automotive Applications  
1CLR  
1D  
V
CC  
2CLR  
1
2
3
4
5
6
7
14  
13  
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
1CLK  
1PRE  
1Q  
12 2D  
11  
10  
9
2CLK  
2PRE  
2Q  
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
1Q  
8
GND  
2Q  
Low Power Consumption, 80-µA Max I  
Typical t = 15 ns  
pd  
4-mA Output Drive at 5 V  
CC  
Low Input Current of 1 µA Max  
†
Contact factory for details. Q100 qualification data available on  
request.  
description/ordering information  
The SN74HC74 device contains two independent D-type positive-edge-triggered flip-flops. A low level at the  
preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When  
PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred  
to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and  
is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed  
without affecting the levels at the outputs.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
‡
PACKAGE  
T
A
SOIC − D  
Reel of 2500  
Reel of 2000  
SN74HC74QDRQ1  
HC74Q  
HC74Q  
−40°C to 125°C  
TSSOP − PW  
SN74HC74QPWRQ1  
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
PRE  
L
CLR  
CLK  
X
D
X
X
X
H
L
Q
H
L
Q
L
H
L
H
X
H
†
†
H
L
L
X
H
H
H
H
H
↑
H
L
L
H
↑
H
H
L
X
Q
Q
0
0
†
This configuration is nonstable; that is, it does not  
persist when PRE or CLR returns to its inactive  
(high) level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

中文翻译

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