HA-5320
Data Sheet
April 1999
File Number 2857.4
1 Microsecond Precision Sample and
Hold Amplifier
Features
6
• Gain, DC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 x 10 V/V
The HA-5320 was designed for use in precision, high speed
data acquisition systems.
• Acquisition Time. . . . . . . . . . . . . . . . . . . . . 1.0µs (0.01%)
o
• Droop Rate. . . . . . . . . . . . . . . . . . . . . . 0.08µV/µs (25 C)
The circuit consists of an input transconductance amplifier
capable of providing large amounts of charging current, a low
leakage analog switch, and an output integrating amplifier. The
analog switch sees virtual ground as its load; therefore, charge
injection on the hold capacitor is constant over the entire
input/output voltage range. The pedestal voltage resulting from
this charge injection can be adjusted to zero by use of the offset
adjust inputs. The device includes a hold capacitor. However, if
improved droop rate is required at the expense of acquisition
time, additional hold capacitance may be added externally.
17µV/µs (Full Temperature)
• Aperture Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns
• Hold Step Error (See Glossary) . . . . . . . . . . . . . . . . . 5mV
• Internal Hold Capacitor
• Fully Differential Input
• TTL Compatible
Applications
This monolithic device is manufactured using the Intersil
Dielectric Isolation Process, minimizing stray capacitance
and eliminating SCRs. This allows higher speed and latch-
free operation. For further information, please see
Application Note AN538.
• Precision Data Acquisition Systems
• Digital to Analog Converter Deglitcher
• Auto Zero Circuits
• Peak Detector
Pinouts
Ordering Information
HA-5320
(PDIP, CERDIP)
TOP VIEW
TEMP.
PKG.
NO.
o
PART NUMBER RANGE ( C)
PACKAGE
14 Ld CERDIP
14 Ld CERDIP
14 Ld PDIP
HA1-5320-2
HA1-5320-5
HA3-5320-5
HA9P5320-5
HA9P5320-9
-55 to 25
0 to 75
F14.3
-INPUT
+INPUT
1
2
3
4
5
6
7
14 S/H CONTROL
13 SUPPLY GND
12 NC
F14.3
E14.3
M16.3
M16.3
0 to 75
OFFSET ADJUST
OFFSET ADJUST
V-
0 to 75
16 Ld SOIC
11
C
EXT
-40 to 85
16 Ld SOIC
10 NC
Functional Diagram
SIG. GND
9
8
V+
INTEGRATOR
BANDWIDTH
OFFSET
ADJUST
OUTPUT
V+
9
3
4
HA-5320
(SOIC)
TOP VIEW
100pF
HA-5320
1
2
-INPUT
+INPUT
-
7
OUTPUT
-INPUT
+INPUT
1
16 S/H CONTROL
15 SUPPLY GND
14 NC
+
2
3
4
5
6
7
8
OFFSET ADJUST
OFFSET ADJUST
V-
C
13
EXT
S/H
CONTROL
14
12 NC
11 V+
SIG. GND
OUTPUT
INTEGRATOR
INTEGRATOR
BANDWIDTH
10
9
5
6
8
13
BANDWIDTH
SUPPLY
GND
V-
SIG.
GND
NC
NC
11
C
EXT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1