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GSM14P512KB-I66 PDF预览

GSM14P512KB-I66

更新时间： 2023-06-15 00:00:00
品牌 Logo 应用领域
GSI 静态存储器
页数 文件大小 规格书
4页 51K
描述
Cache Tag SRAM Module, 64KX32, CMOS

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GSM14P512KB-I66 数据手册

 浏览型号GSM14P512KB-I66的Datasheet PDF文件第2页浏览型号GSM14P512KB-I66的Datasheet PDF文件第3页浏览型号GSM14P512KB-I66的Datasheet PDF文件第4页 
GSM14P256KB-I66  
GSM14P512KB-I66  
G S I T E C H N O L O G Y  
GSM14P256KB-I66  
GSM14P512KB-I66  
COASt 1.4  
256KB / 512KB Modules  
Specification  
Features  
Functional Description (cont’d)  
• For Intel Pentium CPU based systems  
• Operates with clock speeds up to 66MHz  
• Separate 5V and 3.3V power supplies  
• Low cost and low profile card design using 160 gold  
plated leads  
The GSM14P256KB-I66, and 256KB module, use GSI’s  
GS81132Q 32KX32 synchronous burst SRAM and a single  
5V 8Kx8 SRAM for the tag. The GSM14P512K-I66, a  
512KB module, use GSI’s GS82032Q 64KX32 synchronous  
burst SRAM and a single 5V 32Kx8 SRAM for the tag.  
• Multiple ground pin and decopling capacitors provide  
maximum noise protection.  
• Conform to Intel COASt 1.4 specification  
The 3.3V data RAM and the 5V tag RAM provide an exact  
interface between the module and PC chip set. Four pres-  
ence detect bits (PD) allow the system to recognize the type  
of cache configuration present.  
Pentium is a trademark of Intel Corp.  
The low profile card edge package allows 160 signal leads  
to be placed on a module, measuring 4.35 inches long, a  
maximum of 0.310 inches thick and a maximum of 1.14  
inches tall. This compact design allows the OEM to make  
better use of the real estate on the mother-board for added  
functions or smaller design for cost reduction.  
Functional Description  
The GSM14P256KB-I66 and the GSM14P512KB-I66 are  
the secondary cache module designed for use with Intel Pen-  
tium CPU based system. These modules use GSI’s Synchro-  
nous Burst SRAMs in plastic surface mount packages  
mounted on a multilayer epoxy laminate (FR-4) board.  
All inputs and outputs and TTL compatible and operate  
from two separate 5V and 3.3V power supplies. The use of  
multiple ground pins and decoupling capacitors on-board  
reduces failure due to noise.  
Functional Block Diagram - GSM14P512KB-I66  
Functional Block Diagram - GSM14P256KB-I66  
TIO[7:0]  
D[7:0]  
WE  
A[13:0]  
OE  
TIO[7:0]  
16kx8  
5V  
D[7:0]  
WE  
A[12:0]  
OE  
8kx8  
5V  
TWE  
TWE  
A[18:5]  
A[17:5]  
CE  
CE  
CE  
CE  
ECS2  
ECS1  
Vcc5  
ECS2  
ECS1  
Vcc5  
A[15:0]  
OE  
A[18:3]  
COE  
CWE[3:0]  
D[31:0]  
ADSP  
ADSC  
ADV  
CCS  
GWE  
BWE  
A[14:0]  
OE  
WE[3:0]  
D[31:0]  
ADSP  
ADSC  
ADV  
CS  
GWE  
BWE  
64Kx32  
Pipelined  
Burst  
A[17:3]  
COE  
CWE[3:0]  
D[31:0]  
ADSP  
ADSC  
ADV  
CCS  
GWE  
BWE  
32Kx32  
Pipelined  
Burst  
WE[3:0]  
D[31:0]  
ADSP  
ADSC  
ADV  
CS  
GWE  
BWE  
SRAM  
SRAM  
CE2  
CE2  
CE2  
CE2  
Vcc3  
Vcc3  
A[15:0]  
OE  
A[14:0]  
OE  
WE[3:0]  
D[31:0]  
ADSP  
ADSC  
ADV  
CS  
GWE  
BWE  
64Kx32  
Pipelined  
Burst  
32Kx32  
Pipelined  
Burst  
WE[3:0]  
D[31:0]  
ADSP  
ADSC  
ADV  
CS  
GWE  
BWE  
CWE[7:4]  
D[63:32]  
CWE[7:4]  
D[63:32]  
SRAM  
SRAM  
CLK0  
CLK  
NC  
CLK0  
CLK  
PD[3:0]  
NC  
GND  
PD[3:0]  
CE2  
CE2  
GND  
CE2  
CE2  
Vcc3,Vcc5  
Power Supplies  
Vcc3  
Vcc3,Vcc5  
Vcc3  
Power Supplies  
GSI Technology  
1/4  
09/15/97  
1234

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