Datasheet > GS8662T38CGD-633

GS8662T38CGD-633

更新时间： 2023-12-06 20:13:33

品牌	Logo	应用领域
GSI		/
页数	文件大小	规格书
24页	764K
描述
165 BGA

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数据手册

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GS8662T38CGD-633 数据手册

GS8662T20/38CGD-633/550/500

Pin Description Table

Description

Type

Comments

Symbol

Synchronous Address Inputs

Input

—

High: Read

Low: Write

Synchronous Read/Write

R/W

Synchronous Byte Writes

Synchronous Load Pin

Input Clock

Input

Output

Input

Active Low

BW0–BW3

Active Low

Active High

Input Clock

Active Low

Test Mode Select

Test Data Input

—

TMS

TDI

Test Clock Input

TCK

TDO

V_REF

Test Data Output

HSTL Input Reference Voltage

Output Impedance Matching Input

Must Connect Low

Data I/O

Input

—

MCL

—

Three State

Active Low

—

Input/Output

Input

Disable PLL when low

Output Echo Clock

Doff

Output

—

Power Supply

Supply

1.8 V Nominal

1.8 V or 1.5 V Nominal

—

V_DD

V_DDQ

V_SS

Isolated Output Buffer Supply

Power Supply: Ground

Q Valid Output

On-Die Termination

No Connect

Output

Input

—

Active High

—

QVLD

ODT

Notes:

1. NC = Not Connected to die or any other pin

2. When ZQ pin is directly connected to V_DDQ, output impedance is set to minimum value. It should not be directly connected to ground or left

unconnected.

Rev: 1.01 9/2019

4/24

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

1 2 345 6 7...24

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