Datasheet > GS8662DT07BD-333I

GS8662DT07BD-333I

更新时间： 2022-12-29 21:07:09

品牌	Logo	应用领域
GSI		静态存储器
页数	文件大小	规格书
28页	505K
描述
72Mb SigmaQuad-IITM Burst of 4 SRAM

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GS8662DT07BD-333I 数据手册

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GS8662DT07/10/19/37BD-450/400/350/333/300

Pin Description Table

Symbol

Description

Synchronous Address Inputs

Synchronous Read

Type

Input

Comments

—

Active Low

Synchronous Write

BW0–BW3

Synchronous Byte Writes

Active Low

(x8 only)

NW0–NW1

Synchronous Nybble Writes

Input

Input Clock

Input

Active High

Active Low

TMS

TDI

TCK

TDO

V_REF

Test Mode Select

Input

—

Test Data Input

Input

—

Test Clock Input

Input

—

Test Data Output

Output

Input

—

HSTL Input Reference Voltage

Output Impedance Matching Input

Synchronous Data Outputs

Synchronous Data Inputs

Disable DLL when low

Output Echo Clock

—

Input

—

Output

Input

—

Active Low

—

Input

Doff

V_DD

Output

Supply

Output Echo Clock

—

Power Supply

1.8 V Nominal

V_DDQ

V_SS

Isolated Output Buffer Supply

Power Supply: Ground

Q Valid Output

Supply

Output

1.8 V or 1.5 V Nominal

—

QVLD

Low = Low Impedance Range

High/Float = High Impedance Range

ODT

On-Die Termination

No Connect

Input

—

Notes:

1. NC = Not Connected to die or any other pin

2. When ZQ pin is directly connected to V , output impedance is set to minimum value and it cannot be connected to ground or left

DDQ

unconnected.

3. K and K cannot be set to V

voltage.

REF

Rev: 1.00b 8/2017

6/28

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

1...3 4 567 8 9...28

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