Datasheet > GS816273GC-250I

GS816273GC-250I

更新时间： 2024-11-19 06:35:23

品牌	Logo	应用领域
GSI		静态存储器
页数	文件大小	规格书
25页	1018K
描述
Cache SRAM, 256KX72, 2.6ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, BGA-209

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GS816273GC-250I 数据手册

GS816273C-250/225

209-Pin BGA

Commercial Temp

Industrial Temp

250 MHz–225 MHz

256K x 72

18Mb S/DCD Sync Burst SRAMs

2.5 V or 3.3 V V

2.5 V or 3.3 V I/O

SCD and DCD Pipelined Reads

Features

The GS816273C is a SCD (Single Cycle Deselect) and DCD

(Dual Cycle Deselect) pipelined synchronous SRAM. DCD

SRAMs pipeline disable commands to the same degree as read

commands. SCD SRAMs pipeline deselect commands one

stage less than read commands. SCD RAMs begin turning off

their outputs immediately after the deselect command has been

captured in the input registers. DCD RAMs hold the deselect

command for one full cycle and then begin turning off their

outputs just after the second rising edge of clock. The user may

configure this SRAM for either mode of operation using the

SCD mode input.

• Single/Dual Cycle Deselect selectable

• IEEE 1149.1 JTAG-compatible Boundary Scan

• ZQ mode pin for user-selectable high/low output drive

• 2.5 or 3.3 V +10%/–10% core power supply

• 2.5 V or 3.3 V I/O supply

• LBO pin for Linear or Interleaved Burst mode

• Internal input resistors on mode pins allow floating mode pins

• Byte Write (BW) and/or Global Write (GW) operation

• Internal self-timed write cycle

• Automatic power-down for portable applications

• JEDEC-standard 209-bump BGA package

Byte Write and Global Write

Functional Description

Byte write operation is performed by using Byte Write enable

(BW) input combined with one or more individual byte write

signals (Bx). In addition, Global Write (GW) is available for

writing all bytes at one time, regardless of the Byte Write

control inputs.

Applications

The GS816273C is an 18,874,368-bit high performance

synchronous SRAM with a 2-bit burst address counter.

Although of a type originally developed for Level 2 Cache

applications supporting high performance CPUs, the device

now finds application in synchronous SRAM applications,

ranging from DSP main store to networking chip set support.

FLXDrive™

The ZQ pin allows selection between high drive strength (ZQ

low) for multi-drop bus applications and normal drive strength

(ZQ floating or high) point-to-point applications. See the

Output Driver Characteristics chart for details.

Controls

Addresses, data I/Os, chip enable (E1), address burst control

inputs (ADSP, ADSC, ADV), and write control inputs (Bx,

BW, GW) are synchronous and are controlled by a positive-

edge-triggered clock input (CK). Output enable (G) and power

down control (ZZ) are asynchronous inputs. Burst cycles can

be initiated with either ADSP or ADSC inputs. In Burst mode,

subsequent burst addresses are generated internally and are

controlled by ADV. The burst address counter may be

configured to count in either linear or interleave order with the

Linear Burst Order (LBO) input. The Burst function need not

be used. New addresses can be loaded on every cycle with no

degradation of chip performance.

Sleep Mode

Low power (Sleep mode) is attained through the assertion

(High) of the ZZ signal, or by stopping the clock (CK).

Memory data is retained during Sleep mode.

Core and Interface Voltages

The GS816273C operates on a 2.5 V or 3.3 V power supply.

All input are 3.3 V and 2.5 V compatible. Separate output

power (V

) pins are used to decouple output noise from the

DDQ

internal circuits and are 3.3 V and 2.5 V compatible.

Parameter Synopsis

-250

-225

Unit

Pipeline

3-1-1-1

2.6

4.0

2.6

4.5

tCycle

3.3 V

2.5 V

Curr (x72)

430

410

400

375

Rev: 1.03 7/2004

1/25

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

12 3 4 5 6 7...25

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与GS816273GC-250I相关器件

型号	品牌	获取价格	描述	数据表
GS8162V18AB-250IT	GSI	获取价格	Cache SRAM, 1MX18, 5.5ns, CMOS, PBGA119, PLASTIC, BGA-119
GS8162V18AB-300IT	GSI	获取价格	Cache SRAM, 1MX18, 5ns, CMOS, PBGA119, PLASTIC, BGA-119
GS8162V18AD-200IT	GSI	获取价格	Cache SRAM, 1MX18, 6.5ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165
GS8162V18AGB-150	GSI	获取价格	Cache SRAM, 1MX18, 7.5ns, CMOS, PBGA119, PLASTIC, BGA-119
GS8162V18AGB-200I	GSI	获取价格	Cache SRAM, 1MX18, 6.5ns, CMOS, PBGA119, PLASTIC, BGA-119
GS8162V18AGB-200T	GSI	获取价格	Cache SRAM, 1MX18, 6.5ns, CMOS, PBGA119, PLASTIC, BGA-119
GS8162V18AGB-300	GSI	获取价格	Cache SRAM, 1MX18, 5ns, CMOS, PBGA119, PLASTIC, BGA-119
GS8162V18AGB-300I	GSI	获取价格	Cache SRAM, 1MX18, 5ns, CMOS, PBGA119, PLASTIC, BGA-119
GS8162V18AGB-333	GSI	获取价格	Cache SRAM, 1MX18, 4.7ns, CMOS, PBGA119, PLASTIC, BGA-119
GS8162V18AGB-333I	GSI	获取价格	Cache SRAM, 1MX18, 4.7ns, CMOS, PBGA119, PLASTIC, BGA-119

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