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GS81302R08E-350 PDF预览

GS81302R08E-350

更新时间: 2023-11-02 19:29:11
品牌 Logo 应用领域
GSI /
页数 文件大小 规格书
35页 1343K
描述
165 BGA

GS81302R08E-350 数据手册

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GS81302R08/09/18/36E-375/350/333/300/250  
Pin Description Table  
Symbol  
Description  
Type  
Comments  
SA  
Synchronous Address Inputs  
Input  
Read: Active High  
Write: Active Low  
R/W  
Synchronous Read/Write  
Synchronous Byte Writes  
Nybble Write Control Pin  
Input  
Input  
Input  
Active Low  
x18/x36 only  
BW0–BW3  
NW0–NW1  
Active Low  
x8 only  
LD  
K
Synchronous Load Pin  
Input Clock  
Input  
Input  
Active Low  
Active High  
K
Input Clock  
Input  
Active Low  
C
Output Clock  
Input  
Active High  
C
Output Clock  
Input  
Active Low  
TMS  
TDI  
TCK  
TDO  
VREF  
Test Mode Select  
Test Data Input  
Input  
Input  
Test Clock Input  
Input  
Test Data Output  
HSTL Input Reference Voltage  
Output Impedance Matching Input  
Must Connect Low  
Data I/O  
Output  
Input  
ZQ  
MCL  
DQ  
Input  
Input/Output  
Input  
Three State  
Active Low  
Disable DLL when low  
Output Echo Clock  
Output Echo Clock  
Power Supply  
Doff  
CQ  
Output  
Output  
Supply  
CQ  
VDD  
1.8 V Nominal  
VDDQ  
VSS  
Isolated Output Buffer Supply  
Power Supply: Ground  
No Connect  
Supply  
Supply  
1.8 V or 1.5 V Nominal  
NC  
Notes:  
1. NC = Not Connected to die or any other pin  
2. C, C, K, K cannot be set to V voltage.  
REF  
3. When ZQ pin is directly connected to V , output impedance is set to minimum and it cannot be connected to ground or left unconnected.  
DDQ  
Rev: 1.03b 12/2011  
6/35  
© 2011, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  

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