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GS71108AGJ-8T PDF预览

GS71108AGJ-8T

更新时间: 2024-11-07 14:12:51
品牌 Logo 应用领域
GSI 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
15页 541K
描述
Standard SRAM, 128KX8, 8ns, CMOS, PDSO32, 0.400 INCH, ROHS COMPLIANT, SOJ-32

GS71108AGJ-8T 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOJ包装说明:SOJ,
针数:32Reach Compliance Code:compliant
ECCN代码:3A991.B.2.BHTS代码:8542.32.00.41
风险等级:5.72最长访问时间:8 ns
JESD-30 代码:R-PDSO-J32JESD-609代码:e3
长度:20.93 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128KX8封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:3.7 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:PURE MATTE TIN
端子形式:J BEND端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

GS71108AGJ-8T 数据手册

 浏览型号GS71108AGJ-8T的Datasheet PDF文件第2页浏览型号GS71108AGJ-8T的Datasheet PDF文件第3页浏览型号GS71108AGJ-8T的Datasheet PDF文件第4页浏览型号GS71108AGJ-8T的Datasheet PDF文件第5页浏览型号GS71108AGJ-8T的Datasheet PDF文件第6页浏览型号GS71108AGJ-8T的Datasheet PDF文件第7页 
GS71108ATP/J/SJ/U  
7, 8, 10, 12 ns  
SOJ, TSOP, FP-BGA  
Commercial Temp  
Industrial Temp  
128K x 8  
1Mb Asynchronous SRAM  
3.3 V V  
DD  
Center V and V  
DD  
SS  
Features  
SOJ & TSOP-II 128K x 8-Pin Configuration  
• Fast access time: 7, 8, 10, 12 ns  
• CMOS low power operation: 140/120/95/80 mA at minimum  
cycle time  
• Single 3.3 V power supply  
• All inputs and outputs are TTL-compatible  
• Fully static operation  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
1
A3  
A4  
2
A2  
A5  
3
A1  
A6  
4
A0  
A7  
5
CE  
OE  
DQ8  
DQ7  
VSS  
VDD  
DQ6  
DQ5  
A8  
32-pin  
400 mil SOJ  
&
6
DQ1  
DQ2  
VDD  
VSS  
DQ3  
DQ4  
WE  
A16  
A15  
A14  
A13  
• Industrial Temperature Option: 40° to 85°C  
• Package line up  
7
8
J:  
400 mil, 32-pin SOJ package  
9
300 mil SOJ  
&
GJ : RoHS-compliant 400 mil, 32-pin SOJ package  
TP: 400 mil, 32-pin TSOP Type II package  
GP: RoHS-compliant 400 mil, 32-pin TSOP Type II  
package  
10  
11  
12  
13  
14  
15  
16  
400 mil TSOP II  
A9  
SJ: 300 mil, 32-pin SOJ package  
A10  
A11  
A12  
U: 6 mm x 8 mm Fine Pitch Ball Grid Array package  
GU: RoHS-compliant 6 mm x 8 mm Fine Pitch Ball Grid  
Array package  
Packages J, TP, and SJ  
Description  
The GS71108A is a high speed CMOS Static RAM organized  
as 131,072 words by 8 bits. Static design eliminates the need  
for external clocks or timing strobes. The GS operates on a  
single 3.3 V power supply and all inputs and outputs are TTL-  
compatible. The GS71108A is available in a 6 mm x 8 mm  
Fine Pitch BGA package, as well as in 300 mil and 400 mil  
SOJ and 400 mil TSOP Type-II packages.  
Fine Pitch BGA 128K x 8-Bump Configuration  
1
2
3
4
5
6
A
B
C
D
NC  
OE  
A2  
A1  
A0  
NC  
A6  
A5  
A4  
A3  
A7  
NC  
DQ1 NC  
DQ2 NC  
CE DQ8  
NC DQ7  
VSS  
VDD  
VDD  
VSS  
NC  
NC  
NC  
NC  
Pin Descriptions  
E
F
NC  
A14  
A15  
A16  
NC  
Symbol  
A0A16  
DQ1DQ8  
CE  
Description  
Address input  
DQ3 NC  
DQ4 NC  
A11 DQ5 DQ6  
G
H
A12  
A13  
WE  
A9  
A8  
Data input/output  
Chip enable input  
Write enable input  
Output enable input  
+3.3 V power supply  
NC  
A10  
NC  
WE  
Package U  
6 mm x 8 mm, 0.75 mm Bump Pitch  
Top View  
OE  
V
DD  
V
Ground  
SS  
NC  
No connect  
Rev: 1.09 10/2007  
1/15  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  

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