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GS1661AIBE3

更新时间： 2024-11-07 21:14:15
品牌 Logo 应用领域
商升特 - SEMTECH 商用集成电路
页数 文件大小 规格书
85页 6078K
描述
Consumer Circuit,

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中文翻译

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GS1661AIBE3 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active包装说明：LBGA,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：2.22
商用集成电路类型：CONSUMER CIRCUITJESD-30 代码：S-PBGA-B100
长度：11 mm功能数量：1
端子数量：100最高工作温度：85 °C
最低工作温度：-20 °C封装主体材料：PLASTIC/EPOXY
封装代码：LBGA封装形状：SQUARE
封装形式：GRID ARRAY, LOW PROFILE峰值回流温度（摄氏度）：NOT SPECIFIED
座面最大高度：1.7 mm最大供电电压 (Vsup)：1.26 V
最小供电电压 (Vsup)：1.14 V表面贴装：YES
温度等级：OTHER端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：11 mm
Base Number Matches：1

GS1661AIBE3 数据手册

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GS1661A  
HD/SD SDI Receiver, with Integrated Adaptive Cable Equalizer complete with  
SMPTE Video Processing  
Key Features  
Description  
•
•
•
•
Operation at 1.485Gb/s, 1.485/1.001Gb/s and 270Mb/s  
Supports SMPTE 292M, SMPTE 259M-C and DVB-ASI  
Integrated adaptive cable equalizer  
The GS1661A is a multi-rate SDI integrated Receiver which  
includes complete SMPTE processing, as per SMPTE 292M  
and SMPTE 259M-C. The SMPTE processing features can be  
bypassed to support signals with other coding schemes.  
Typical equalized length of Belden 1694A cable:  
The GS1661A integrates Gennum's adaptive cable  
equalizer technology, achieving unprecedented cable  
lengths and jitter tolerance. It features DC restoration to  
compensate for the DC content of SMPTE pathological  
signals.  
Š
230m at 1.485Gb/s  
440m at 270Mb/s  
Š
•
Integrated Reclocker with low phase noise, integrated  
VCO  
•
•
•
•
Serial digital reclocked, or non-reclocked output  
Ancillary data extraction  
The device features an Integrated Reclocker with an  
internal VCO and a wide Input Jitter Tolerance (IJT) of  
0.7UI.  
Parallel data bus selectable as either 20-bit or 10-bit  
Comprehensive error detection and correction  
features  
A serial digital loop-through output is provided, which can  
be configured to output either reclocked or non-reclocked  
serial digital data. The serial digital output can be  
connected to an external cable driver.  
•
•
Output H, V, F or CEA 861 Timing Signals  
1.2V digital core power supply, 1.2V and 3.3V analog  
power supplies, and selectable 1.8V or 3.3V I/O power  
supply  
The device operates in one of four basic modes: SMPTE  
mode, DVB-ASI mode, Data-Through mode or Standby  
mode.  
•
•
•
•
•
GSPI Host Interface  
Wide temperature range of -40ºC to +85ºC  
Low power operation (typically 460mW)  
Small 11mm x 11mm 100-ball BGA package  
Pb-free and RoHS compliant  
In SMPTE mode (the default operating mode), the GS1661A  
performs full SMPTE processing, and features a number of  
data integrity checks and measurement capabilities.  
The device also supports ancillary data extraction, and can  
provide entire ancillary data packets through  
host-accessible registers. It also provides a variety of other  
packet detection and error handling features. All of these  
processing features are optional, and may be individually  
enabled or disabled through register programming.  
Applications  
Application: Dual Link (HD-SDI)  
to Single Link (3G-SDI) Converter  
HD-SDI  
Link A  
10-bit  
HD-SDI  
10-bit  
Deserializer  
FIFO  
In DVB-ASI mode, sync word detection, alignment and  
8b/10b decoding is applied to the received data stream.  
GS1661A  
HVF/PCLK  
3G-SDI  
W
R
HVF/PCLK  
GS2962  
HD-SDI  
Link B  
10-bit  
HD-SDI  
10-bit  
In Data-Through mode all forms of SMPTE and DVB-ASI  
processing are disabled, and the device can be used as a  
simple serial to parallel converter.  
Deserializer  
FIFO  
HVF/PCLK  
GS1661A  
W
R
GS4910  
HVF  
The device can also operate in a lower power Standby  
mode. In this mode, no signal processing is carried out and  
the parallel output is held static.  
XTAL  
GS1661A HD/SD SDI Receiver  
Data Sheet  
1 of 85  
www.semtech.com  
54387 - 2  
September 2012  
 
 
 
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