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GRM31CR61C106KC31L PDF预览

GRM31CR61C106KC31L

更新时间： 2024-11-04 12:05:59
品牌 Logo 应用领域
美国微芯 - MICROCHIP 闪存微控制器电容器PC
页数 文件大小 规格书
258页 2294K
描述
64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers

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中文翻译

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GRM31CR61C106KC31L 数据手册

 浏览型号GRM31CR61C106KC31L的Datasheet PDF文件第2页浏览型号GRM31CR61C106KC31L的Datasheet PDF文件第3页浏览型号GRM31CR61C106KC31L的Datasheet PDF文件第4页浏览型号GRM31CR61C106KC31L的Datasheet PDF文件第5页浏览型号GRM31CR61C106KC31L的Datasheet PDF文件第6页浏览型号GRM31CR61C106KC31L的Datasheet PDF文件第7页 
PIC24FJ128GA010 FAMILY  
64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers  
High-Performance CPU:  
Analog Features:  
• 10-Bit, Up to 16-Channel Analog-to-Digital Converter  
- 500 ksps conversion rate  
- Conversion available during Sleep and Idle  
• Dual Analog Comparators with Programmable  
Input/Output Configuration  
• Modified Harvard Architecture  
• Up to 16 MIPS Operation @ 32 MHz  
• 8 MHz Internal Oscillator with 4x PLL Option and  
Multiple Divide Options  
• 17-Bit x 17-Bit Single-Cycle Hardware  
Multiplier  
Peripheral Features:  
• 32-Bit by 16-Bit Hardware Divider  
• 16 x 16-Bit Working Register Array  
• C Compiler Optimized Instruction Set Architecture:  
- 76 base instructions  
- Flexible addressing modes  
• Two Address Generation Units for Separate Read  
and Write Addressing of Data Memory  
• Two 3-Wire/4-Wire SPI modules, Supporting  
4 Frame modes with 8-Level FIFO Buffer  
2
• Two I C™ modules Support Multi-Master/Slave  
mode and 7-Bit/10-Bit Addressing  
• Two UART modules:  
- Supports RS-232, RS-485 and LIN/J2602  
- On-chip hardware encoder/decoder for IrDA  
- Auto-wake-up on Start bit  
®
Special Microcontroller Features:  
- Auto-Baud Detect  
- 4-level FIFO buffer  
• Operating Voltage Range of 2.0V to 3.6V  
• Flash Program Memory:  
• Parallel Master Slave Port (PMP/PSP):  
- Supports 8-bit or 16-bit data  
- 1000 erase/write cycles  
- 20-year data retention minimum  
- Supports 16 address lines  
• Self-Reprogrammable under Software Control  
• Selectable Power Management modes:  
- Sleep, Idle and Alternate Clock modes  
• Fail-Safe Clock Monitor Operation:  
- Detects clock failure and switches to on-chip,  
low-power RC oscillator  
• Hardware Real-Time Clock/Calendar (RTCC):  
- Provides clock, calendar and alarm functions  
• Programmable Cyclic Redundancy Check (CRC)  
-
-
User-programmable polynomial  
8/16-level FIFO buffer  
• Five 16-Bit Timers/Counters with Programmable  
Prescaler  
• Five 16-Bit Capture Inputs  
• Five 16-Bit Compare/PWM Outputs  
• High-Current Sink/Source (18 mA/18 mA) on All  
I/O Pins  
• Configurable, Open-Drain Output on Digital I/O Pins  
• Up to 5 External Interrupt Sources  
• 5.5V Tolerant Input (digital pins only)  
• On-Chip 2.5V Regulator  
• JTAG Boundary Scan and Programming Support  
• Power-on Reset (POR), Power-up Timer (PWRT)  
and Oscillator Start-up Timer (OST)  
• Flexible Watchdog Timer (WDT) with On-Chip,  
Low-Power RC Oscillator for Reliable Operation  
• In-Circuit Serial Programming™ (ICSP™) and  
In-Circuit Emulation (ICE) via 2 Pins  
Program  
Pins Memory  
(Bytes)  
SRAM  
(Bytes)  
Timers  
16-Bit  
10-Bit  
A/D (ch)  
2
Device  
SPI  
I C™  
PIC24FJ64GA006  
PIC24FJ96GA006  
PIC24FJ128GA006  
PIC24FJ64GA008  
PIC24FJ96GA008  
PIC24FJ128GA008  
PIC24FJ64GA010  
PIC24FJ96GA010  
PIC24FJ128GA010  
64  
64  
64K  
96K  
8K  
8K  
8K  
8K  
8K  
8K  
8K  
8K  
8K  
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
16  
16  
16  
16  
16  
16  
16  
16  
16  
2
2
2
2
2
2
2
2
2
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
64  
128K  
64K  
80  
80  
96K  
80  
128K  
64K  
100  
100  
100  
96K  
128K  
2005-2012 Microchip Technology Inc.  
DS39747F-page 1  
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中文翻译

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