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GP2015/1G/FP2Q

更新时间： 2024-02-23 15:53:45
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 电信电信集成电路
页数 文件大小 规格书
24页 212K
描述
Telecom Circuit, 1-Func, CMOS, PQFP48, 7 X 7 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026BBC, LQFP-48

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GP2015/1G/FP2Q 技术参数

是否Rohs认证： 符合生命周期：Transferred
包装说明：LFQFP, QFP48,.35SQ,20Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.84
JESD-30 代码：S-PQFP-G48JESD-609代码：e3
长度：7 mm湿度敏感等级：3
功能数量：1端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装等效代码：QFP48,.35SQ,20封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：3/5 V认证状态：Not Qualified
座面最大高度：1.6 mm子类别：Other Telecom ICs
最大压摆率：0.077 mA标称供电电压：3 V
表面贴装：YES技术：CMOS
电信集成电路类型：TELECOM CIRCUIT温度等级：INDUSTRIAL
端子面层：MATTE TIN端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：7 mm

GP2015/1G/FP2Q 数据手册

 浏览型号GP2015/1G/FP2Q的Datasheet PDF文件第1页浏览型号GP2015/1G/FP2Q的Datasheet PDF文件第3页浏览型号GP2015/1G/FP2Q的Datasheet PDF文件第4页浏览型号GP2015/1G/FP2Q的Datasheet PDF文件第5页浏览型号GP2015/1G/FP2Q的Datasheet PDF文件第6页浏览型号GP2015/1G/FP2Q的Datasheet PDF文件第7页 
GP2015  
ABSOLUTE MAXIMUM RATINGS  
(Non-simultaneous)  
Max. Supply Voltage  
Max. RF Input  
Max. voltage on any pin  
except LD (pin 21) and PReset (pin 9), which are 5.5V Min.  
voltage on any pin  
Storage Temperature  
Operation Junction Temperature  
10MHz Reference Input  
IF STRIP  
The input signal to the GP2015 is the GPS L1 signal  
7V  
+15dBm  
CC/VDD + 0.5V  
received via an antenna and a suitable LNA. The L1 input is  
a spread spectrum signal at 1575.42MHz with 1.023Mbps  
BPSK modulation. The signal level at the antenna is about  
-130dBm, spreadovera2.046MHzbandwidth, sothewanted  
signal is actually buried in noise. The high RF input  
compressionpointoftheGP2015meansthatwithsubsequent  
IF filtering it is possible to reject large out of band jamming  
signals, in particular 900MHz as used by mobile  
telephones.Theon-chipPLLgeneratesthefirstlocal-oscillator  
frequency at 1400MHz. The output of the front-end mixer  
(Stage 1) at 175.42 MHz can then be filtered before being  
applied to the second stage. The double-balanced stage 1  
mixer outputs are open-collectors, and require external dc  
V
VEE - 0.5V  
-65°C to +150°C  
-40°C to +150°C  
1.5V pk -pk  
ESD PROTECTION  
The GP2015 device is static sensitive. The most  
sensitive pins withstand a 750V test by the human body  
model. Therefore, ESD handling precautions are essential to  
avoid degradation of performance or permanent damage to  
this device.  
bias to VCC  
.
The second stage contains further gain and a mixer  
with a local oscillator signal at 140 MHz giving a second IF at  
35.42 MHz. The second stage mixer is also double-balanced  
PRODUCT DESCRIPTION  
with open-collector outputs requiring external dc bias to VCC  
.
The GP2015 receives the 1575.42MHz signal  
transmitted by GPS satellites and converts it to a 4.309MHz  
IF,usingtripledown-conversion.The4.309MHzIFissampled  
to produce a 2-bit digital output. If the GP2015 is used in  
conjunction with the GP2021 correlator, then the GP2021  
provides a sampling clock of 5.714MHz. This converts the IF  
to a 1.405MHz 2-bit digital output at TTL levels.  
The GP2015 can operate from a single supply from  
+3V (nominal) to +5V (nominal).  
The signal from stage 2 is passed through an external  
filter with a 1dB bandwidth of 1.9MHz. The performance of  
this filter is critical to system performance and it is  
recommended that a SAW filter is used (part number  
SAFJA35M4WC0Z00, available from Murata). The output of  
the filter then feeds the main IF amplifier. This includes 2  
AGC amplifiers and a third mixer with a local oscillator signal  
at 31.111 MHz giving a final IF at 4.309 MHz. There is an on-  
chip filter after the third mixer which provides filtering centred  
on 4.309 MHz. The IF output, which has 1kΩ output  
impedance, is provided for test purposes. All of the signals  
withintheIFamplifieraredifferentialincludingthefilterinputs  
A block diagram of the circuit is shown in figure 2.  
175.42MHz FILTER  
35.42MHz FILTER  
AGC CAPACITOR  
(37,38)  
(40,41)  
(44,45)  
(47,48)  
(23)  
(24)  
(1)  
FRONT  
END  
MIXER  
2nd  
STAGE  
MIXER  
3rd  
STAGE  
MIXER  
(32)  
4.3MHz  
FILTER  
IF Output  
(4.309MHz)  
RF Input  
AGC  
AGC  
L1  
(1575.42MHz)  
1.400GHz  
140MHz  
31.11MHz  
VCO  
÷5  
÷2  
÷9  
+Vr  
AGC  
CONTROL  
VOLTAGE  
REGULATOR  
(2)  
(3)  
÷7  
÷4  
PLL  
LOOP  
FILTER  
EXTERNAL  
LOOP  
-Vr  
_
+1.21V  
FILTER  
+
POWER-ON  
RESET  
(21)  
PHASE  
DETECTOR  
PLL LOCK  
LOGIC O/P  
(LD)  
(15)  
1.400GHz  
PHASE-  
LOCKED  
LOOP  
SIGN  
O/P  
LATCH  
SIGN  
TTL O/P  
POWER  
CONTROL  
PLL  
REFERENCE  
OSCILLATOR  
(27)  
(28)  
PLL REF I/P  
10MHz (REF 2)  
(14)  
(11)  
MAG  
O/P  
LATCH  
MAG  
TTL O/P  
SAMPLE  
CLOCK I/P (CLK)  
(5.71MHz TTL)  
A -> D  
CONVERTER  
REF 1 I/P  
(FOR USE WITH  
CRYSTAL REF  
ONLY)  
(16,17)  
(20)  
(8)  
(19)  
(9)  
(TEST)  
POWER-ON  
REFERENCE  
I/P  
40MHz CLOCK O/P  
(FOR CORRELATOR  
CHIP)  
POWER  
DOWN I/P  
POWER-ON  
RESET O/P  
(PRESET)  
(PD  
n
)
(PREF)  
(OPCIK +/-)  
Figure 2 - Block diagram of GP2015  
2
1234567...24

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