Datasheet > GM71C18163C

GM71C18163C

更新时间： 2022-12-13 07:01:54

品牌	Logo	应用领域
海力士 - HYNIX		/
页数	文件大小	规格书
11页	114K
描述
1,048,576 WORDS x 16 BIT CMOS DYNAMIC RAM

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数据手册

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GM71C18163C 数据手册

GM71C18163C

GM71CS18163CL

Self Refresh Mode ( L-version )

GM71CS18163

CL-5

GM71CS18163

CL-6

GM71CS18163

CL-7

Symbol

Parameter

Unit Note

Min Max Min Max Min Max

RASS

RAS Pulse Width(Self-Refresh)

100

110

-50

100

130

-50

tRPS

RAS Precharge Time(Self-Refresh)

CAS Hold Time(Self-Refresh)

-50

tCHS

Notes :

1. AC measurements assume tT = 2 ns.

2. An initial pause of 200us is required after power followed by a minimum of eight initializa-

tion cycles (any combination of cycles containing RAS-only refresh or CAS-before-RAS

refresh).

3. Operation with the tRCD (max) limit insures that tRAC (max) can be met, tRCD (max) is

specified as a reference point only; if tRCD is greater than the specified tRCD (max) limit, then

access time is controlled exclusively by tCAC.

4. Operation with the tRAD (max) limit insures that tRAC (max) can be met, tRAD (max) is

specified as a reference point only; if tRAD is greater than the specified tRAD (max) limit, then

access time is controlled exclusively by tAA.

5. Either tODD or tCDD must be satisfied.

6. Either tDZO or tDZC must be satisfied.

7. VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Also,

transition times are measured between VIH (min) and VIL (max).

8. Assumes that tRCD <= tRCD (max) and tRAD <= tRAD (max). If tRCD or tRAD is greater than the

maximum recommended value shown in this table, tRAC exceeds the value shown.

9. Measured with a load circuit equivalent to 1TTL loads and 100pF.

10. Assumes that tRCD >= tRCD (max) and tRAD <= tRAD (max).

11. Assumes that tRCD <= tRCD (max) and tRAD >= tRAD (max).

12. Either tRCH or tRRH must be satisfied for a read cycles.

13. tOFF (max) and tOEZ (max) define the time at which the outputs achieve the open circuit condi-

tion and are not referred to output voltage levels.

14. tWCS, tRWD, tCWD, tAWD and tCPW are not restrictive operating parameters. They are included in

the data sheet as electrical characteristics only; if tWCS >= tWCS (min), the cycle is an early

write cycle and the data out pin will remain open circuit(high impedance) throughout the

entire cycle; if tRWD>=tRWD(min), tCWD>=tCWD(min), and tAWD>=tAWD(min), or tCWD>=tCWD(min)

tAWD >= tAWD (min) and tCPW >= tCPW (min), the cycle is a read-modify-write and the data out-

put will contain data read from the selected cell; if neither of the above sets of conditions is

satisfied, the condition of the data out (at access time) is indeterminate.

Rev 0.1 / Apr’01

1...6 7 8910 11

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