GM71C(S)17400C/CL
4,194,304 WORDS x 4 BIT
CMOS DYNAMIC RAM
Description
Features
* 4,194,304 Words x 4 Bit Organization
* Fast Page Mode Capability
* Single Power Supply (5.0V+/-10%)
* Fast Access Time & Cycle Time
The GM71C(S)17400C/CL is the new
generation dynamic RAM organized 4,194,304
words x 4 bit. GM71C(S)17400C/CL has
realized higher density, higher performance and
various functions by utilizing advanced CMOS
process technology. The GM71C(S)17400C/CL
offers Fast Page Mode as a high speed access
mode. Multiplexed address inputs permit the
GM71C(S)17400C/CL to be packaged in a
standard 300 mil 24(26) pin SOJ, and a standard
300 mil 24(26) pin plastic TSOP II. The
package size provides high system bit densities
and is compatible with widely available
automated testing and insertion equipment.
System oriented features include single power
supply 5.0V+/-10% tolerance, direct interfacing
capability with high performance logic families
such as Schottky TTL.
(Unit: ns)
tRAC
tCAC
t
RC
tPC
50
60
70
13
15 110
18 130
90
35
40
45
GM71C(S)17400C/CL-5
GM71C(S)17400C/CL-6
GM71C(S)17400C/CL-7
* Low Power
Active : 660/605/550mW (MAX)
Standby : 11mW (CMOS level : MAX)
: 0.83mW (L-version : MAX)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
* All inputs and outputs TTL Compatible
* 2048 Refresh Cycles/32ms
* 2048 Refresh Cycles/128ms (L-version)
* Battery backup operation (L-version)
* Test function : 16bit parallel test mode
Pin Configuration
24(26) SOJ
24(26) TSOP II
1
26
1
26
VCC
I/O1
I/O2
WE
VSS
VCC
I/O1
I/O2
WE
VSS
2
3
4
5
6
25
24
23
22
21
2
3
4
5
6
25
24
23
22
21
I/O4
I/O3
CAS
OE
I/O4
I/O3
CAS
OE
RAS
NC
RAS
A11
A9
A9
8
9
19
18
8
9
19
18
A10
A0
A8
A7
A6
A5
A4
VSS
A10
A0
A8
A7
A6
A5
A4
VSS
10
11
12
13
17
16
15
14
10
11
12
13
17
16
15
14
A1
A1
A2
A2
A3
A3
VCC
VCC
(Top View)
Rev 0.1 / Apr’01