Datasheet > GF6968ED

GF6968ED

更新时间： 2024-11-08 23:53:39

品牌	Logo	应用领域
其他 - ETC		晶体晶体管
页数	文件大小	规格书
4页	136K
描述
TRANSISTOR \| MOSFET \| N-CHANNEL \| 20V V(BR)DSS \| 6.8A I(D) \| CHIP

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数据手册

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GF6968ED 数据手册

GF6968ED

Battery Switch, ESD Protected

N-Channel Enhancement-Mode MOSFET Die

20V R 20 Ω I 6.8A

DS(ON) m D

Chip Geometry

1370 m

1070 m

300 m

Gate

300

344 m

300 m

Source

Physical Characteristics

• Die size : 2000 X 1200µm (78.8 X 47.2 mils)

• Metalization:

Top: Al/Si/Cu

Back: Ti/Ni/Ag

• Metal Thickness:

Top: 3.0µm

Back: 1.4µm

Features

• Advanced Trench process technology

• High density cell design for ultra-low

on-resistance

• Die thickness: 9 –13 mils

• Bonding Area:

Source: As shown

Gate: 175 x 175µm

• ESD protected

• Logic level

• Ideal for Li ion battery pack applications

• Recommended Wire Bonding:

Source: 2 mil ∅ Au wire (5 or more wires preferred)

Gate: 2 mil ∅ Au wire

Note: More source wires can further improve performance

Maximum Ratings and Thermal Characteristics(T_A= 25°C unless otherwise noted)

Parameter

Symbol

V_DS

V_GS

I_D

Limit

Unit

Drain-Source Voltage

Gate-Source Voltage

Continuous Drain Current⁽¹⁾

Pulsed Drain Current

6.8

I_DM

T_A= 25°C

T_A= 70°C

1.5

0.96

Maximum Power Dissipation⁽¹⁾

P_D

Operating Junction and Storage Temperature Range

Junction-to-Ambient Thermal Resistance⁽¹⁾

T_J, T_stg

R_θJA

–55 to 150

°C

°C/W

Note: (1) Maximum ratings are based on die packaged in a TSSOP-8 Dual Common Drain package. Actual rating can increase (or decrease),

depending on actual assembly method used

8/9/01

12 3 4

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