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GE28F320W18BE60 PDF预览

GE28F320W18BE60

更新时间: 2024-11-26 09:36:15
品牌 Logo 应用领域
英特尔 - INTEL 内存集成电路闪存
页数 文件大小 规格书
106页 1496K
描述
Flash, 2MX16, 60ns, PBGA56, 9 X 7.70 MM, 1 MM HEIGHT, VFBGA-56

GE28F320W18BE60 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:BGA包装说明:9 X 7.70 MM, 1 MM HEIGHT, VFBGA-56
针数:56Reach Compliance Code:compliant
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.28最长访问时间:60 ns
其他特性:SYNCHRONOUS BURST MODE OPERATION ALSO POSSIBLE启动块:BOTTOM
命令用户界面:YES通用闪存接口:YES
数据轮询:NOJESD-30 代码:R-PBGA-B56
JESD-609代码:e0长度:9 mm
内存密度:33554432 bit内存集成电路类型:FLASH
内存宽度:16功能数量:1
部门数/规模:8,63端子数量:56
字数:2097152 words字数代码:2000000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:2MX16
封装主体材料:PLASTIC/EPOXY封装代码:VFBGA
封装等效代码:BGA56,7X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH页面大小:4 words
并行/串行:PARALLEL峰值回流温度(摄氏度):240
电源:1.8 V编程电压:1.8 V
认证状态:Not Qualified座面最大高度:1 mm
部门规模:4K,32K最大待机电流:0.000005 A
子类别:Flash Memories最大压摆率:0.04 mA
最大供电电压 (Vsup):1.95 V最小供电电压 (Vsup):1.7 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30切换位:NO
类型:NOR TYPE宽度:7.7 mm
Base Number Matches:1

GE28F320W18BE60 数据手册

 浏览型号GE28F320W18BE60的Datasheet PDF文件第2页浏览型号GE28F320W18BE60的Datasheet PDF文件第3页浏览型号GE28F320W18BE60的Datasheet PDF文件第4页浏览型号GE28F320W18BE60的Datasheet PDF文件第5页浏览型号GE28F320W18BE60的Datasheet PDF文件第6页浏览型号GE28F320W18BE60的Datasheet PDF文件第7页 
Intel® Wireless Flash Memory (W18)  
28F320W18, 28F640W18, 28F128W18  
Datasheet  
Product Features  
High Performance Read-While-Write/  
Erase  
Architecture  
—Multiple 4-Mbit partitions  
—Dual Operation: RWW or RWE  
Parameter block size = 4-Kword  
—Main block size = 32-Kword  
Top or bottom parameter devices  
—16-bit wide data bus  
Burst frequency at 66 MHz  
(zero wait states)  
60 ns Initial access read speed  
11 ns Burst mode read speed  
20 ns Page mode read speed  
4-, 8-, 16-, and Continuous-Word Burst  
mode reads  
Burst and Page mode reads in all  
Blocks, across all partition boundaries  
Burst Suspend feature  
Software  
—5 µs (typ.) Program and Erase Suspend  
latency time  
Flash Data Integrator (FDI) and  
Common Flash Interface (CFI)  
Compatible  
Enhanced Factory Programming at  
3.1 µs/word  
Security  
Programmable WAIT signal polarity  
Packaging and Power  
128-bit OTP Protection Register:  
64 unique pre-programmed bits +  
64 user-programmable bits  
—90 nm: 32- and 64-Mbit in VF BGA  
—130 nm: 32-, 64-, and 128-Mbit in VF  
BGA; 128-Mbit in QUAD+ package  
—56 Active Ball Matrix, 0.75 mm Ball-  
Pitch  
Absolute Write Protection with V at  
PP  
ground  
Individual and Instantaneous Block  
Locking/Unlocking with Lock-Down  
Capability  
—V = 1.70 V to 1.95 V  
CC  
—V  
—V  
(90 nm) = 1.70 V to 1.95 V  
(130 nm) = 1.70 V to 2.24 V or  
CCQ  
CCQ  
Quality and Reliability  
1.35 V to 1.80 V  
Temperature Range: –40 °C to +85 °C  
100K Erase Cycles per Block  
90 nm ETOX™ IX Process  
130 nm ETOX™ VIII Process  
—V  
(130 nm) = 1.35 V to 2.24 V  
CCQ  
Standby current (130 nm): 8 µA (typ.)  
—Read current: 8 mA (4-word burst, typ.)  
The Intel® Wireless Flash Memory (W18) device with flexible multi-partition dual-operation  
architecture, provides high-performance Asynchronous and Synchronous Burst reads. It is an  
ideal memory for low-voltage burst CPUs. Combining high read performance with flash  
memory intrinsic non-volatility, the W18 device eliminates the traditional system-performance  
paradigm of shadowing redundant code memory from slow nonvolatile storage to faster  
execution memory. It reduces total memory requirement that increases reliability and reduces  
overall system power consumption and cost. The W18 device’s flexible multi-partition  
architecture allows program or erase to occur in one partition while reading from another  
partition. This allows for higher data write throughput compared to single-partition architectures  
and designers can choose code and data partition sizes. The dual-operation architecture allows  
two processors to interleave code operations while program and erase operations take place in  
the background.  
Order Number: 290701, Revision: 015  
07-Dec-2005  

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