Contents
42 Boundary-Scan Register—Bit Order ..........................................................................................81
43 Natural Boundaries for Load and Store Accesses......................................................................81
44 Summary of Byte Load and Store Accesses ..............................................................................82
45 Summary of Short Word Load and Store Accesses...................................................................82
46 Summary of n-Word Load and Store Accesses (n = 1, 2, 3, 4)..................................................83
Revision History
Date
Revision
Description
To address the fact that many of the package prefix variables have
changed, all package prefix variables in this document are now
indicated with an "x".
August 2004
006
Removed reference to A80960JF-16 from Table 3 on page 15.
Removed reference to NG80960JC-40, NG80960JC-33, NG80960JS-16,
and NG80960JF-16 from Table 4 on page 15.
Removed reference to GD80960JC-40, GD80960JC-33, and 80960JS-16
in Table 6 on page 16.
September 2002
005
Removed reference to 80960JC-40, 80960JC-33, 80960JS-16, and
80960JF-16 in Table 18 on page 35.
Removed reference to 80960JC-40, 80960JC-33, 80960JS-16, and
80960JF-16 from Table 21 on page 39.
Removed reference to 80960JC-40, 80960JC-33, 80960JS-16 and
80960JF-16 from Table 22 on page 42.
Added new extended temp device offerings. See Table 5 on page 16.
Removed PGA package availability from JS/JC/JT processors.
September 1999
June 1999
004
003
Changed AC timing parameter TOV1 (min) for extended temp devices only.
See Table 22 on page 42.
Merged the 80960JS/JC datasheet information into this datasheet
(previously named 80960JA/JF/JD/JT 3.3 V Embedded 32-Bit
Microprocessor datasheet).
Updated ICC values for the 80960JS/JC/JT processors. Increased
TIH1 specificationfor the 80960JS/JC/JT processors. Updated
MPBGA thermal specifications.
Corrected orientation of MPBGA package diagrams (Figure 6 on page 30
and Figure 7 on page 31).
December 1998
002
001
Added Figure 11 on page 46, Figure 12 on page 46, Figure 14 on page 47,
and Figure 15 on page 48 to distinguish 80960JT 3.3-V and 5-V signal
derating curves from the 80960JA/JF/JD derating curves.
This datasheet supersedes revisions to the following 80960Jx datasheets:
#273109 (JT), #272971-002 (JD), and #276146-001 (JA/JF). In addition to
combining the documents into one, the following content was changed:
Figure 1 on page 7: Added MPBGA package to diagram.
March 1998
Section 3.2.4, “80960Jx 196-Ball MPBGA Pinout” on page 30: Added new
Figures 6 and 7, Tables 10, 11 and 13.
Figure 16 on page 48: Added with the note that follows the figure.
6
Datasheet