Contents
Contents
1.0 Introduction....................................................................................................................................
2.0 80960Jx Overview..........................................................................................................................
7
9
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
80960 Processor Core........................................................................................................10
Burst Bus ............................................................................................................................11
Timer Unit ...........................................................................................................................11
Priority Interrupt Controller..................................................................................................11
Instruction Set Summary ....................................................................................................12
Faults and Debugging.........................................................................................................12
Low Power Operation .........................................................................................................12
Test Features......................................................................................................................12
Memory-Mapped Control Registers....................................................................................13
2.10 Data Types and Memory Addressing Modes......................................................................13
3.0 Pac aging Information................................................................................................................15
k
3.1
3.2
Available Processors and Packages ..................................................................................15
Pin Descriptions..................................................................................................................16
3.2.1 Functional Pin Definitions ......................................................................................16
3.2.2 80960Jx 132-Lead PGA Pinout .............................................................................23
3.2.3 80960Jx 132-Lead PQFP Pinout ...........................................................................27
3.2.4 80960Jx 196-Ball MPBGA Pinout..........................................................................30
4.0 Electrical Specifications .............................................................................................................35
4.1
4.2
4.3
4.4
4.5
4.6
4.7
Absolute Maximum Ratings................................................................................................35
Operating Conditions..........................................................................................................35
Connection Recommendations...........................................................................................36
VCC5 Pin Requirements (VDIFF).......................................................................................36
VCCPLL Pin Requirements ................................................................................................37
D.C. Specifications .............................................................................................................38
A.C. Specifications..............................................................................................................42
4.7.1 A.C. Test Conditions and Derating Curves............................................................45
4.7.1.1 Output Delay or Hold vs. Load Capacitance..........................................46
4.7.1.2
T
vs. AD Bus Load Capacitance.........................................................47
LX
4.7.1.3 ICC Active vs. Frequency ......................................................................49
4.7.2 A.C. Timing Waveforms.........................................................................................53
5.0 Device Identification....................................................................................................................59
5.1
5.2
5.3
80960JS/JC/JT Device Identification Register....................................................................60
80960JD Device Identification Register..............................................................................61
80960JA/JF Device Identification Register.........................................................................62
6.0 Thermal Specifications ...............................................................................................................63
6.1
Thermal Management Accessories ....................................................................................68
6.1.1 Heatsinks ...............................................................................................................68
7.0 Bus Functional Waveforms ........................................................................................................69
7.1
7.2
Basic Bus States.................................................................................................................79
Boundary-Scan Register.....................................................................................................80
Datasheet
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