Contents
Figures
1
2
3
4
5
6
7
8
9
80960Jx Microprocessor Package Options..................................................................................
7
80960Jx Block Diagram..............................................................................................................10
132-Lead Pin Grid Array Top View-Pins Facing Down...............................................................23
132-Lead Pin Grid Array Bottom View-Pins Facing Up..............................................................24
132-Lead PQFP - Top View .......................................................................................................27
196-Ball Mini Plastic Ball Grid Array Top View-Balls Facing Down............................................30
196-Ball Mini Plastic Ball Grid Array Bottom View-Balls Facing Up ...........................................31
VCC5 Current-Limiting Resistor .................................................................................................36
VCCPLL Lowpass Filter .............................................................................................................37
10 A.C. Test Load............................................................................................................................45
11 Output Delay or Hold vs. Load Capacitance–80960JS/JC/JT (3.3 V Signals) ..........................46
12 Output Delay or Hold vs. Load Capacitance–80960JS/JC/JT (5 V Signals) .............................46
13 Output Delay or Hold vs. Load Capacitance–80960JA/JF/JD....................................................47
14
15
16
17
T
T
T
vs. AD Bus Load Capacitance–80960JS/JC/JT (3.3 V Signals) .........................................47
vs. AD Bus Load Capacitance–80960JS/JC/JT (5 V Signals) ............................................48
vs. AD Bus Load Capacitance–80960JA/JF/JD...................................................................48
Active (Power Supply) vs. Frequency–80960JA/JF .............................................................49
LX
LX
LX
I
CC
18 80960JA/JF I Active (Thermal) vs. Frequency .......................................................................49
CC
19 80960JD I Active (Power Supply) vs. Frequency...................................................................50
CC
20 80960JD I Active (Thermal) vs. Frequency ............................................................................50
CC
21 80960JC I Active (Power Supply) vs. Frequency...................................................................51
CC
22 80960JC I Active (Thermal) vs. Frequency ............................................................................51
CC
23 80960JS I Active (Power Supply) vs. Frequency...................................................................52
CC
24 80960JS I Active (Thermal) vs. Frequency............................................................................52
CC
25 CLKIN Waveform........................................................................................................................53
26
27
28
29
30
31
32
T
T
T
T
T
T
T
Output Delay Waveform ....................................................................................................53
Output Float Waveform .......................................................................................................54
OV1
OF
IS1
IS2
IS3
IS4
and T
and T
and T
and T
Input Setup and Hold Waveform ..........................................................................54
Input Setup and Hold Waveform ..........................................................................54
Input Setup and Hold Waveform ..........................................................................55
Input Setup and Hold Waveform ..........................................................................55
IH1
IH2
IH3
IH4
, T
and T
Relative Timings Waveform........................................................................56
LX LXL
LXA
33 DT/R# and DEN# Timings Waveform.........................................................................................56
34 TCK Waveform...........................................................................................................................57
35
36
37
38
T
T
T
T
and T
Input Setup and Hold Waveforms.................................................................57
BSIS1
BSIH1
and T
and T
Output Delay and Output Float Waveform.................................................57
Output Delay and Output Float Waveform.................................................58
BSOV1
BSOV2
BSOF1
BSOF2
and T
Input Setup and Hold Waveform...................................................................58
BSIS2
BSIH2
39 80960JS/JC/JT Device Identification Register Fields.................................................................60
40 80960JD Device Identification Register Fields ...........................................................................61
41 80960JA/JF Device Identification Register Fields ......................................................................62
42 Non-Burst Read and Write Transactions Without Wait States, 32-Bit Bus.................................69
43 Burst Read and Write Transactions Without Wait States, 32-Bit Bus ........................................70
44 Burst Write Transactions With 2,1,1,1 Wait States, 32-Bit Bus..................................................71
45 Burst Read and Write Transactions Without Wait States, 8-Bit Bus ..........................................72
46 Burst Read and Write Transactions With 1, 0 Wait States
and Extra Tr State on Read, 16-Bit Bus .....................................................................................73
47 Double Word Read Bus Request, Misaligned One Byte From
Quad Word Boundary, 32-Bit Bus, Little Endian ........................................................................74
4
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