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FX828P4 PDF预览

FX828P4

更新时间: 2024-01-21 14:15:28
品牌 Logo 应用领域
CMLMICRO 电信光电二极管电信集成电路
页数 文件大小 规格书
34页 883K
描述
Telecom Circuit, 1-Func, CMOS, PDIP24, DIP-24

FX828P4 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIL-24针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84其他特性:ALSO OPERATES WITH 5 V NOMINAL SUPPLY
数据速率:0.134 MbpsJESD-30 代码:R-PDIP-T24
长度:31.37 mm功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.6
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified座面最大高度:5.59 mm
标称供电电压:3.3 V表面贴装:NO
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:15.24 mm
Base Number Matches:1

FX828P4 数据手册

 浏览型号FX828P4的Datasheet PDF文件第1页浏览型号FX828P4的Datasheet PDF文件第2页浏览型号FX828P4的Datasheet PDF文件第3页浏览型号FX828P4的Datasheet PDF文件第5页浏览型号FX828P4的Datasheet PDF文件第6页浏览型号FX828P4的Datasheet PDF文件第7页 
CTCSS/DCS/SELCALL Processor  
FX828  
1.3  
Signal List  
Package  
D2/D5/P4  
Signal  
Name  
Description  
Pin No.  
Type  
O/P  
I/P  
1
2
XTALN  
The inverted output of the on-chip oscillator.  
XTAL/CLOCK  
The input to the on-chip oscillator, for external  
Xtal circuit or clock.  
3
4
5
SERIAL CLOCK  
I/P  
The "C-BUS" serial clock input. This clock,  
produced by the µController, is used for transfer  
timing of commands and data to and from the  
device. See "C-BUS" Timing Diagram (Figure  
4).  
COMMAND DATA  
REPLY DATA  
I/P  
The "C-BUS" serial data input from the  
µController. Data is loaded into this device in  
8-bit bytes, MSB (B7) first, and LSB (B0) last,  
synchronised to the SERIAL CLOCK. See  
"C-BUS" Timing Diagram (Figure 4).  
O/P  
The "C-BUS" serial data output to the  
µController. The transmission of REPLY DATA  
bytes is synchronised to the SERIAL CLOCK  
under the control of the CSN input. This 3-state  
output is held at high impedance when not  
sending data to the µController. See "C-BUS"  
Timing Diagram (Figure 4).  
6
7
CSN  
I/P  
The "C-BUS" data loading control function: this  
input is provided by the µController. Data  
transfer sequences are initiated, completed or  
aborted by the CSN signal. See "C-BUS" Timing  
Diagram (Figure 4).  
IRQN  
O/P  
This output indicates an interrupt condition to the  
µController by going to a logic "0". This is a  
"wire-ORable" output, enabling the connection of  
up to 8 peripherals to 1 interrupt port on the  
µController. This pin has a low impedance  
pulldown to logic "0" when active and a high-  
impedance when inactive. An external pullup  
resistor is required.  
The conditions that cause interrupts are  
indicated in the IRQ FLAG register and are  
effective if not masked out by a corresponding  
bit in the IRQ MASK register.  
ã 1997 Consumer Microcircuits Limited  
4
D/828/3  

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