Datasheet > FX614D4-LF-TR

FX614D4-LF-TR

更新时间： 2024-01-11 10:00:46

品牌	Logo	应用领域
CMLMICRO		电信光电二极管电信集成电路
页数	文件大小	规格书
17页	329K
描述
Modem, 1.2kbps Data, CMOS, PDSO16, LEAD FREE, SOIC-16

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FX614D4-LF-TR 技术参数

Bell 202 Compatible Modem

FX614

1.5.2 Mode Control Logic

The FX614's operating mode is determined by the logic levels applied to the M0 and M1 input pins:

[1]

Rx Mode

1200bits/sec

Off

Tx Mode

150bits/sec

1200bits/sec

Off / 5bits/sec

Data Retime

1200bits/sec

'Zero-Power'

[1] If enabled.

In the 'Zero-Power' (ZP) mode, power is removed from all internal circuitry. When leaving the 'ZP' mode there

must be a delay of 20ms before any Tx data is passed to, or Rx data read from, the device to allow the bias

level, filters and oscillator to stabilise. On applying power to the device the mode must be set to 'ZP', i.e. M0 =

'1', M1 = '1', until V_DDhas stabilised.

1.5.3 Rx Input Amplifier

This amplifier is used to adjust the received signal to the correct amplitude for the FSK receiver and Energy

Detect circuits (see section 1.6.1).

1.5.4 Receive Filter and Equaliser

Is used to attenuate out of band noise and interfering signals, especially the locally generated transmit tones

which might otherwise reach the 1200bits/sec FSK Demodulator and Energy Detector circuits. This block also

includes a switchable equaliser section. When the RXEQ pin is low, the overall group delay of the receive filter

is flat over the 1200bits/sec frequency range. If the RXEQ pin is high the receive filter's typical overall group

delay will be as shown in Figure 3.

Figure 3 Rx Equaliser Group Delay (RXEQ = '1') wrt 1700Hz

ã 1997 Consumer Microcircuits Limited

D/614/4

1...3 4 567 8 9...17

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