Datasheet > FTLF1621P1XCL

FTLF1621P1XCL

更新时间： 2024-10-29 01:17:15

品牌	Logo	应用领域
菲尼萨 - FINISAR		/
页数	文件大小	规格书
12页	700K
描述
OC-48 LR-2/STM L-16.2 RoHS Compliant Pluggable SFP Transceiver

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FTLF1621P1XCL 数据手册

FTLF1621P1xCL Pluggable SFP Product Specification –September 2008 F i n i s a r

The standard SFP serial ID provides access to identification information that describes

the transceiver’s capabilities, standard interfaces, manufacturer, and other information.

Additionally, Finisar SFP transceivers provide a unique enhanced digital diagnostic

monitoring interface, which allows real-time access to device operating parameters such

as transceiver temperature, laser bias current, transmitted optical power, received optical

power and transceiver supply voltage. It also defines a sophisticated system of alarm and

warning flags, which alerts end-users when particular operating parameters are outside of

a factory set normal range.

The SFP MSA defines a 256-byte memory map in E²PROM that is accessible over a

2-wire serial interface at the 8 bit address 1010000X (A0h). The digital diagnostic

monitoring interface makes use of the 8 bit address 1010001X (A2h), so the originally

defined serial ID memory map remains unchanged. The interface is identical to, and is

thus fully backward compatible with both the GBIC Specification and the SFP Multi

Source Agreement. The complete interface is described in Finisar Application Note AN-

2030: “Digital Diagnostics Monitoring Interface for SFP Optical Transceivers”.

The operating and diagnostics information is monitored and reported by a Digital

Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed

through a 2-wire serial interface. When the serial protocol is activated, the serial clock

signal (SCL, Mod Def 1) is generated by the host. The positive edge clocks data into the

SFP transceiver into those segments of the E²PROM that are not write-protected. The

negative edge clocks data from the SFP transceiver. The serial data signal (SDA, Mod

Def 2) is bi-directional for serial data transfer. The host uses SDA in conjunction with

SCL to mark the start and end of serial protocol activation. The memories are organized

as a series of 8-bit data words that can be addressed individually or sequentially.

For more information, please see the SFP MSA documentation¹or Finisar Application

Note AN-2030.

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与FTLF1621P1XCL相关器件

型号	品牌	获取价格	描述	数据表
FTLF1621P2BCL	FINISAR	获取价格	OC-48 LR-2/STM L-16.2 RoHS Compliant Pluggable SFP Transceiver
FTLF1621P2BTL	FINISAR	获取价格	OC-48 LR-2/STM L-16.2 RoHS Compliant Pluggable SFP Transceiver
FTLF1621P2WCL	FINISAR	获取价格	OC-48 LR-2/STM L-16.2 RoHS Compliant Pluggable SFP Transceiver
FTLF1621P2WTL	FINISAR	获取价格	OC-48 LR-2/STM L-16.2 RoHS Compliant Pluggable SFP Transceiver
FTLF1621S1GCL	FINISAR	获取价格	OC-48 LR-2/STM L-16.2 Multirate 2x10 SFF Transceiver
FTLF1621S1HCL	FINISAR	获取价格	OC-48 LR-2/STM L-16.2 Multirate 2x10 SFF Transceiver
FTLF1621S1KCL	FINISAR	获取价格	OC-48 LR-2/STM L-16.2 Multirate 2x10 SFF Transceiver
FTLF1621S1MCL	FINISAR	获取价格	OC-48 LR-2/STM L-16.2 Multirate 2x10 SFF Transceiver
FTLF1621S1XCL	FRONTIER	获取价格	Product Guide
FTLF1721P1XCL	FRONTIER	获取价格	Product Guide

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