Datasheet > FT28HC256SMB-12

FT28HC256SMB-12

更新时间： 2022-10-12 13:40:48

品牌	Logo	应用领域
福思力 - FORCE		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
23页	2123K
描述
5 Volt, Byte Alterable EEPROM

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数据手册

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FT28HC256SMB-12 数据手册

FT28HC256

SOFTWARE ALGORITHM

The three-byte sequence opens the page wr ite window,

enabling the host to write from one to one hundred

twenty-eight bytes of data. Once the page load cycle

has been completed, the device will automatically be

returned to the data protected state.

Selecting the software data protection mode requires

the host system to precede data write operations by a

series of three write operations to three specific

addresses. Refer to Figure 6 and 7 for the sequence .

SOFTWARE DATA PROTECTION

Figure 6. Timing Sequence—Byte or Page Write

)

Data

Address

AAA

5555

2AAA

5555

Writes

Write

Protected

≤ t

Byte

Age

BLC MAX

Figure 7. Write Sequence for Software Data

Protection

Regardless of whether the device has previously been

protected or not, once the software data protection

algorithm is used and data has been written, the

FT28HC256 will automatically disable further writes

unless another command is issued to cancel it. If no

further commands are issued the FT28HC256 will be

write protected during power-down and after any sub-

sequent power-up.

Write Data AA

to Address

5555

Write Data 55

to Address

2AAA

Note: Once initiated, the sequence of write operations

should not be interrupted.

Write Data A0

to Address

5555

Byte/Page

Load Enabled

Write Data XX

to Any

Address

Optional

Byte/Page

Load Operation

Write Last

Byte to

Last Address

After t

Re-Enters Data

Protected State

Characteristics subject to change without notice. 6 of 23

REV 1.0

1...3 4 567 8 9...23

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