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FST3126MX PDF预览

FST3126MX

更新时间: 2024-11-06 11:01:43
品牌 Logo 应用领域
安森美 - ONSEMI 开关驱动光电二极管逻辑集成电路
页数 文件大小 规格书
7页 126K
描述
4 位总线开关

FST3126MX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:SOIC-14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.86Is Samacsys:N
控制类型:ENABLE HIGH系列:CBT/FST/QS/5C/B
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TR
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):0.003 mAProp。Delay @ Nom-Sup:0.25 ns
传播延迟(tpd):0.25 ns认证状态:Not Qualified
座面最大高度:1.753 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:3.9 mmBase Number Matches:1

FST3126MX 数据手册

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FST3126  
Product Preview  
4-Bit Bus Switch  
The ON Semiconductor FST3126 is a quad, high performance  
switch. The device is CMOS TTL compatible when operating between  
4 and 5.5 Volts. The device exhibits extremely low R  
nearly zero propagation delay. The device adds no noise or ground  
bounce to the system.  
The device consists of four independent 1bit switches with  
separate Output/Enable (OE) pins. Port A is connected to Port B when  
OE is high. If OE is low, the switch is high Z.  
and adds  
ON  
http://onsemi.com  
MARKING  
DIAGRAMS  
14  
14  
FST3126G  
AWLYWW  
1
Features  
SOIC14  
D SUFFIX  
CASE 751A  
R t 4 W Typical  
ON  
1
Less Than 0.25 nsMax Delay Through Switch  
Nearly Zero Standby Current  
No Circuit Bounce  
14  
1
14  
Control Inputs are TTL/CMOS Compatible  
PinForPin Compatible With QS3126, FST3126, CBT3126  
All Popular Packages: SOIC14 & TSSOP14  
These are PbFree Devices  
FST  
3126  
ALYWG  
G
1
TSSOP14  
DT SUFFIX  
CASE 948G  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
OE  
1A  
1B  
OE  
2A  
V
CC  
A
= Assembly Location  
= Year  
1
OE  
4A  
4B  
OE  
3A  
3B  
WL, L = Wafer Lot  
Y
WW, W = Work Week  
4
3
2
G or G = PbFree Package  
2B  
GND  
(Note: Microdot may be in either location)  
8
PIN NAMES  
Figure 1. Pin Assignment for  
SOIC and TSSOP  
Pin  
OE , OE , OE , OE  
4
Description  
Bus Switch Enables  
1
2
3
1A, 2A, 3A, 4A  
1B, 2B, 3B, 4B  
NC  
Bus A  
Bus B  
Not Connected  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
© Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
July, 2013 Rev. P1  
FST3126/D  

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