5秒后页面跳转
FS6370-01-XTP PDF预览

FS6370-01-XTP

更新时间: 2024-01-10 06:05:33
品牌 Logo 应用领域
AMI 光电二极管
页数 文件大小 规格书
24页 328K
描述
Clock Generator, CMOS, PDSO16,

FS6370-01-XTP 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP, SOP16,.25Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PDSO-G16
端子数量:16最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:3.3/5 V认证状态:Not Qualified
子类别:Clock Generators最大压摆率:43 mA
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

FS6370-01-XTP 数据手册

 浏览型号FS6370-01-XTP的Datasheet PDF文件第1页浏览型号FS6370-01-XTP的Datasheet PDF文件第2页浏览型号FS6370-01-XTP的Datasheet PDF文件第3页浏览型号FS6370-01-XTP的Datasheet PDF文件第5页浏览型号FS6370-01-XTP的Datasheet PDF文件第6页浏览型号FS6370-01-XTP的Datasheet PDF文件第7页 
Data Sheet  
FS6370-01/FS6370-01g EEPROM Programmable 3-PLL Clock Generator IC  
For example, a fixed divide-by-eight pre-scaler could have been used in the feedback divider. Unfortunately, a divide-by-eight would limit the effective  
modulus of the entire feedback divider to multiples of eight. This limitation would restrict the ability of the PLL to achieve a desired input-frequency-to-  
output-frequency ratio without making both the reference and feedback divider values comparatively large. Generally, very large values are undesirable  
as they degrade the bandwidth of the PLL, increasing phase jitter and acquisition time.  
To understand the operation of the feedback divider, refer to Figure 4. The M-counter (with a modulus always equal to M) is cascaded with the dual-  
modulus pre-scaler. The A-counter controls the modulus of the pres-caler. If the value programmed into the A-counter is A, the pre-scaler will be set to  
divide by N+1 for A pre-scaler outputs. Thereafter, the prescaler divides by N until the M-counter output resets the A-counter, and the cycle begins again.  
Note that N=8, and A and M are binary numbers.  
Dual  
Modulus  
Prescaler  
fVCO  
M
fPD  
Counter  
FBKDIV[2:0]  
FBKDIV[10:3]  
A
Counter  
Figure 4: Feedback Divider  
Suppose that the A-counter is programmed to zero. The modulus of the pre-scaler will always be fixed at N; and the entire modulus of the feedback divider  
becomes MxN.  
Next, suppose that the A-counter is programmed to a one. This causes the pre-scaler to switch to a divide-by-N+1 for its first divide cycle and then revert  
to a divide-by-N. In effect, the A-counter absorbs (or "swallows") one extra clock during the entire cycle of the feedback divider. The overall modulus is  
now seen to be equal to MxN+1.  
This example can be extended to show that the feedback divider modulus is equal to MxN+A, where A<M.  
3.1.3 Feedback Divider Programming  
For proper operation of the feedback divider, the A-counter must be programmed only for values that are less than or equal to the M-counter. Therefore,  
not all divider moduli below 56 are available for use. This is shown in Table 2.  
Above a modulus of 56, the feedback divider can be programmed to any value up to 2047.  
Table 2: Feedback Divider Modulus Under 56  
A-Counter: FBKDIV[2:0]  
M-Counter:  
FBKDIV[10:3]  
000  
8
001  
9
010  
-
011  
-
100  
-
101  
110  
111  
00000001  
00000010  
00000011  
00000100  
00000101  
00000110  
00000111  
-
-
-
-
16  
24  
32  
40  
48  
56  
17  
25  
33  
41  
49  
57  
18  
26  
34  
42  
50  
58  
-
-
-
-
27  
35  
43  
51  
59  
-
-
-
-
-
36  
44  
52  
60  
-
-
45  
53  
61  
-
-
-
54  
62  
63  
Feedback Divider Modulus  
AMI Semiconductor - Rev. 2.0, Mar. 05  
www.amis.com.  
4

与FS6370-01-XTP相关器件

型号 品牌 描述 获取价格 数据表
FS6377 ONSEMI Programmable 3-PLL Clock Generator IC

获取价格

FS6377-01 AMI Programmable 3-PLL Clock Generator IC

获取价格

FS6377-01G AMI Programmable 3-PLL Clock Generator IC

获取价格

FS6377-01G-XTD ONSEMI Programmable 3-PLL Clock Generator IC

获取价格

FS6377-01G-XTP ONSEMI Programmable 3-PLL Clock Generator IC

获取价格

FS6377-01I ONSEMI 暂无描述

获取价格