Datasheet > 微控制器和处理器 > 时钟发生器> FS6131-01TR

FS6131-01TR

更新时间： 2024-01-18 12:20:55

品牌	Logo	应用领域
安森美 - ONSEMI		时钟发生器光电二极管
页数	文件大小	规格书
44页	757K
描述
IC,MISCELLANEOUS CLOCK GENERATOR,CMOS,SOP,16PIN,PLASTIC

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技术参数
数据手册

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FS6131-01TR 技术参数

生命周期：	Transferred	包装说明：	SOP, SOP16,.25
Reach Compliance Code：	unknown	风险等级：	5.8
JESD-30 代码：	R-PDSO-G16	端子数量：	16
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP16,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	电源：	5 V
认证状态：	Not Qualified	子类别：	Clock Generators
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

FS6131-01TR 数据手册

FS6131

First, the FS6131 is used to sample the output clock with the feedback source clock and set/clear the phase align flag when the two

clocks match to within a feedback source clock period. Then, the clock gobbler is used to delay the output phase relative to the input

phase one VCO clock at a time until a transition on the flag occurs. When a transition occurs, the output and input clocks are phase

aligned.

To enter this mode, set STAT[1] to one and clear STAT[0] to zero. If the CMOS bit is set to one, the LOCK/IPRG pin can display the

flag. The flag is always available under software control by reading back the STAT[1] bit, which will be overwritten by the flag in this

mode.

4.2.4. Feedback Divider Monitoring

The feedback divider clock can be brought out the LOCK/IPRG pin independent of the output clock to allow monitoring of the feedback

divider clock. To enter this mode, set both the STAT[1] and STAT[0] bits to one. The CMOS bit must also be set to one to enable the

LOCK/IPRG pin as an output.

4.3 Loop Gain Analysis

For applications where an external loop filter is required, the following analysis example can be used to determine loop gain and

stability.

The loop gain of a PLL is the product of all of the gains within the loop.

The transfer function of the phase detector and charge pump combination is (in A/rad):

I_chgpump

K_PD

2π

The transfer function of the loop filter is (in V/A):

K_LF(s) =

⎛

⎜

⎞

⎟

⎜

⎟

sC₂+

⎜

⎝

⎟

⎠

⎛

⎝

⎞

⎟

⎠

⎜

sC₁

The VCO transfer function (in rad/s, and accounting for the phase integration that occurs in the VCO) is:

K_VCO(s) = 2πA_VCO

Rev. 4 | Page 7 of 44 | www.onsemi.com

1...4 5 678 9 10...44

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