Datasheet > FS6282-03

FS6282-03

更新时间： 2024-02-12 06:41:14

品牌	Logo	应用领域
其他 - ETC		时钟发生器光电二极管
页数	文件大小	规格书
5页	53K
描述
DUAL PLL CLOCK GENERATOR IC

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技术参数
数据手册

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FS6282-03 技术参数

生命周期：	Obsolete	Reach Compliance Code：	unknown
风险等级：	5.84	Is Samacsys：	N
JESD-30 代码：	R-PDSO-G8	端子数量：	8
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP8,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	电源：	3.3 V
认证状态：	Not Qualified	子类别：	Clock Generators
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

FS6282-03 数据手册

FS6282

AMERICAN MICROSYSTEMS, INC.

Dual PLL Clock Generator IC

October 1999

1.0 Features

2.0 Description

The FS6282 is a monolithic CMOS clock generator IC

designed to minimize cost and component count in digital

video/audio systems.

•

Dual phase-locked loop (PLL) device with three out-

put clock frequencies

•

3.3V supply voltage

Two high-resolution phase-locked loops generate two

output clocks (CLKA and CLKB) through an array of post-

dividers. All frequencies are ratiometrically derived from

the crystal oscillator frequency. The locking of all the out-

put frequencies together can eliminate unpredictable ar-

tifacts in video systems and reduce electromagnetic in-

terference (EMI) due to frequency harmonic stacking.

Small circuit board footprint (8-pin 0.150″ SOIC)

Custom frequency selections available - contact your

local AMI Sales Representative for more information

Figure 1: Pin Configuration

Table 1: Crystal / Output Frequencies

CLKA

VSS

VDD

CLKC

CLKB

DEVICE f_XIN(MHz) CLKA (MHz) CLKB (MHz) CLKC (MHz)

FS6282-03 20.000

20.000

48.000

8.000

XIN

NOTE: Contact AMI for custom PLL frequencies

XOUT

8-pin (0.150″) SOIC

Figure 2: Block Diagram

XIN

CLKA

CLKB

CLKC

CRYSTAL

OSC.

XOUT

PLL

DIVIDER

ARRAY

FS6282

This document contains information on a preproduction product. Specifications and information herein are subject to change without notice.

10.1.99

ISO9001

12 3 4 5

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