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FPD87310VHB PDF预览

FPD87310VHB

更新时间: 2024-02-25 03:25:02
品牌 Logo 应用领域
德州仪器 - TI 外围集成电路
页数 文件大小 规格书
30页 785K
描述
SPECIALTY MICROPROCESSOR CIRCUIT, PQFP80, PLASTIC, TQFP-80

FPD87310VHB 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:TFQFP, TQFP80,.55SQReach Compliance Code:unknown
HTS代码:8542.31.00.01风险等级:5.92
JESD-30 代码:S-PQFP-G80JESD-609代码:e0
长度:12 mm端子数量:80
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TFQFP
封装等效代码:TQFP80,.55SQ封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Display Controllers
最大压摆率:140 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:12 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

FPD87310VHB 数据手册

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PRELIMINARY  
May 2000  
FPD87310  
Universal Interface XGA Panel Timing Controller with  
RSDS (Reduced Swing Differential Signaling) and  
FPD-Link  
General Description  
Features  
n RSDS (Reduced Swing Differential Signaling) Column  
Driver bus for low power and reduced EMI  
n Drives RSDS Column Drivers at 130 Mb/s with a 65  
MHz clock  
The FPD87310 Panel Timing Controller is an integrated  
FPD-Link + RSDS + TFT-LCD Timing Controller. It resides  
on the Flat Panel Display and provides the interface signal  
routing and Timing Control between Graphics or Video Con-  
trollers and a TFT-LCD system. FPD-Link, a low power, low  
EMI (ElectroMagnetic Interference) interface is used be-  
tween this Controller and the Host system.  
n 6- or 8-bit LVDS Video System Interface (FPD-Link)  
n 10 General Purpose Outputs for Column/Row Drivers  
n Optional EEPROM programming allows fine tuning in  
development and production environments  
n Selectable dual initialization value sets to share parts for  
the different model panel module  
A RSDS (Reduced Swing Differential Signaling) Column  
Driver interface is used between the Timing Controller and  
the Column Drivers.  
Programmable, General Purpose Outputs provide Row and  
Column Driver control. The FPD87310 is configured via  
metal mask initialization value or an optional external serial  
EEPROM. Reserved space in the EEPROM is available for  
display identification information. The system can access the  
EEPROM to read the display identification data or program  
initialization values used by the FPD87310.  
n Ability to drive XGA/SVGA TFT-LCD Systems  
n Narrow 9-bit+CLK differential Column Driver Bus  
minimizes width of Source PCB  
n CMOS circuitry operates from a 3.3V supply  
n Supports Graphics Controllers with spread spectrum  
interface featurefor lower EMI  
This single 9-bit+CLK differential bus conveys the 18 bits  
color data for XGA panels at 130 Mb/s when using VESA 60  
Hz standard timing.  
System Diagram  
DS101077-1  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2000 National Semiconductor Corporation  
DS101077  
www.national.com  

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