FPDA200V

更新时间： 2024-02-14 23:01:17

品牌	Logo	应用领域
FILTRONIC		晶体晶体管
页数	文件大小	规格书
3页	60K
描述
HIGH PERFORMANCE PHEMT WITH SOURCE VIAS

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技术参数
数据手册

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FPDA200V 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.61
Is Samacsys：	N	Base Number Matches：	1

FPDA200V 数据手册

Preliminary Data Sheet

FP DA2 0 0 V

HIGH P ERFORMANCE P HEMT WITH S OURCE VIAS

FEATURES

GATE

BOND

21 dBm Output Power at 1-dB

DRAIN

BOND

PAD

Compression at 18 GHz

PAD

12.5 dB Power Gain at 18 GHz

55% Power-Added Efficiency

Source Vias to Backside Metallization

DIE SIZE: 15.6X13.2 mils (395x335 mm)

DIE THICKNESS: 3.9 mils (100 mm)

BONDING PADS: 3.1X3.1 mils (80x80 mm)

DES CRIP TION AND AP P LICATIONS

The FPDA200V is an Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs)

Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam direct-

write 0.25 mm by 200 mm Schottky barrier gate. The recessed “mushroom” gate structure minimizes

parasitic gate-source and gate resistances. The epitaxial structure and processing have been

optimized for high dynamic range.

Typical applications include high dynamic range driver stages for commercial applications including

wireless infrastructure systems, broad bandwidth amplifiers, and optical systems.

Source vias have been added for improved performance and assembly convenience. Each via hole

has 0.02 nH of inductance. Additionally, the via holes remove the need for source bond wires,

meaning only two bond wires are required for assembly. Because the via connects the source pad to

the backside metallization, self-bias configurations should be designed with caution.

ELECTRICAL S P ECIFICATIONS @ T_{Am b ie n t}= 2 5 °C

Parameter

Symbol

I_DSS

Test Conditions

V_DS= 2 V; V_GS= 0 V

V_DS= 5 V; I_DS= 50% I_DSS

V_DS= 2 V; V_GS= 1 V

V_DS= 2 V; V_GS= 0 V

V_GS= -5 V

Min

Typ

Max Units

Saturated Drain-Source Current

Power at 1-dB Compression

Power Gain at 1-dB Compression

Power-Added Efficiency

Maximum Drain-Source Current

Transconductance

dBm

P-1dB

G-1dB

PAE

I_MAX

G_M

12.5

125

Gate-Source Leakage Current

Pinch-Off Voltage

I_GSO

V_P

V_DS= 2 V; I_DS= 1 mA

I_GS= 1 mA

-0.25

-0.8

-1.5

Gate-Source Breakdown

Voltage Magnitude

|V_BDGS

Gate-Drain Breakdown

Voltage Magnitude

|V_BDGD

I_GD= 1 mA

Thermal Resistivity

frequency=18 GHz

260

Q_JC

°C/W

P h o n e : (408) 988-1845

Fa x: (408) 970-9950

h ttp :// www.filss.com

Re vis e d : 2/25/02

Em a il: sales@filss.com

12 3

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