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FOD3182SDV PDF预览

FOD3182SDV

更新时间: 2024-02-17 17:17:26
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 输出元件光电
页数 文件大小 规格书
23页 654K
描述
3A Output Current, High Speed MOSFET Gate Driver Optocoupler

FOD3182SDV 技术参数

是否无铅: 不含铅生命周期:Active
包装说明:DIP-8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8541.40.80.00
风险等级:1.08其他特性:UL RECOGNIZED, VDE APPROVED
配置:SINGLE最大正向电流:0.016 A
最大正向电压:1.8 V最大绝缘电压:5000 V
JESD-609代码:e3安装特点:SURFACE MOUNT
元件数量:1最高工作温度:100 °C
最低工作温度:-40 °C光电设备类型:LOGIC IC OUTPUT OPTOCOUPLER
最大功率耗散:0.295 W子类别:Optocoupler - Transistor Outputs
最小供电电压:10 V表面贴装:YES
端子面层:Tin (Sn)Base Number Matches:1

FOD3182SDV 数据手册

 浏览型号FOD3182SDV的Datasheet PDF文件第4页浏览型号FOD3182SDV的Datasheet PDF文件第5页浏览型号FOD3182SDV的Datasheet PDF文件第6页浏览型号FOD3182SDV的Datasheet PDF文件第8页浏览型号FOD3182SDV的Datasheet PDF文件第9页浏览型号FOD3182SDV的Datasheet PDF文件第10页 
Notes:  
1. Derate linearly above +79°C free air temperature at a rate of 0.37mA/°C.  
2. Maximum pulse width = 10µs, maximum duty cycle = 11%.  
3
Derate linearly above +79°C, free air temperature at the rate of 5.73mW/°C.  
4. No derating required across operating temperature range.  
5. In this test, V is measured with a dc load current of 100mA. When driving capacitive load V will approach V  
DD  
OH  
OH  
as I approaches zero amps.  
OH  
6. Maximum pulse width = 1ms, maximum duty cycle = 20%.  
7.  
t
propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the  
PHL  
falling edge of the V signal. t  
propagation delay is measured from the 50% level on the rising edge of the input  
O
PLH  
pulse to the 50% level of the rising edge of the V signal.  
O
8. PWD is defined as | t  
– t  
| for any given device.  
PHL  
PLH  
8. The difference between t  
equal loads.  
and t  
between any two FOD3182 parts under same operating conditions, with  
PHL  
PLH  
10. Pin 1 and 4 need to be connected to LED common.  
11. Common mode transient immunity in the high state is the maximum tolerable dV /dt of the common mode pulse  
CM  
V
to assure that the output will remain in the high state (i.e. V > 15V).  
O
CM  
12. Common mode transient immunity in a low state is the maximum tolerable dV /dt of the common mode pulse,  
CM  
V
, to assure that the output will remain in a low state (i.e. V < 1.0V).  
O
CM  
13. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000Vrms,  
60Hz for 1 second (leakage detection current limit I < 10µA).  
I-O  
14. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted  
together.  
©2010 Fairchild Semiconductor Corporation  
FOD3182 Rev. 1.0.9  
www.fairchildsemi.com  
7

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