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FLIXF3208BESE000 PDF预览

FLIXF3208BESE000

更新时间： 2024-10-26 20:00:07
品牌 Logo 应用领域
英特尔 - INTEL 电信电信集成电路
页数 文件大小 规格书
192页 2126K
描述
Framer, CMOS, PBGA256,

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FLIXF3208BESE000 技术参数

生命周期：Obsolete包装说明：BGA, BGA256,16X16,40
Reach Compliance Code：unknown风险等级：5.84
JESD-30 代码：S-PBGA-B256端子数量：256
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：BGA
封装等效代码：BGA256,16X16,40封装形状：SQUARE
封装形式：GRID ARRAY电源：1.8,3.3 V
认证状态：Not Qualified子类别：Digital Transmission Controllers
表面贴装：YES技术：CMOS
电信集成电路类型：FRAMER温度等级：INDUSTRIAL
端子形式：BALL端子节距：1 mm
端子位置：BOTTOMBase Number Matches：1

FLIXF3208BESE000 数据手册

 浏览型号FLIXF3208BESE000的Datasheet PDF文件第2页浏览型号FLIXF3208BESE000的Datasheet PDF文件第3页浏览型号FLIXF3208BESE000的Datasheet PDF文件第4页浏览型号FLIXF3208BESE000的Datasheet PDF文件第5页浏览型号FLIXF3208BESE000的Datasheet PDF文件第6页浏览型号FLIXF3208BESE000的Datasheet PDF文件第7页 
Intel® IXF3208 Octal T1/E1/J1 Framer  
with Intel® On-Chip PRM  
Preliminary Datasheet  
Product Features  
■ Octal T1/E1/J1 Framer  
■ Diagnostics:  
■ Software selectable and fully independent  
—BERT generators and analyzers for  
extensive on-chip error testing at DS-0,  
DS-1, and E1 rates  
T1/E1/J1 operation  
■ Support for T1/E1/J1 standards:  
—T1: T1-SF, T1-ESF, Lucent* SLC®96  
—Pseudo-random and programmable bit-  
—E1: PCM30, G.704, G.706, G.732 ISDN  
sequence generator and monitoring  
PRI  
—Per-link diagnostics and loopbacks  
—J1: J1-SF and J1-ESF  
■ Programmable system backplane data rates  
at 1x/2x/4x/8x of T1/E1 data rates for  
■ Programmable transmit/receive slip buffers  
support of MVIP, H-MVIP, H.100, and CHI  
■ On-chip Intel® Performance Report  
Messaging per ANSI T1.231, T1.403, and  
ITU G.826  
■ Support for fractional T1/E1  
■ Signaling:  
—Support for T1/E1 CAS and T1/E1 CCS  
■ 24 fully independent HDLC controllers  
with 128-byte transmit/receive FIFOs  
support GR-303 and V5.1/5.2 standards  
—Signaling state-change indication  
—Signaling freeze/debounce per DS-1  
—Signaling force per DS-0  
■ FDL Support:  
—DL support for ESF per ANSI T1.403 or  
■ Red/Yellow/AIS alarm indication  
■ Intel®/Motorola* 8-bit processor interface  
■ Industry-standard P1149.1 JTAG test port  
AT&T* TR54016 (T1/J1)  
—DDL bit access for Lucent SLC®96  
—Sa bit access for E1  
■ Low-power 1.8/3.3-V CMOS technology  
■ 256-PBGA package, 17 mm x 17 mm  
■ Operating temperature -40 °C to 85 °C  
with 5-V tolerant I/Os  
Applications  
■ Integrated Multi-service Access Platforms ■ Channel service unit (CSU) / Data Service  
(IMAPs)  
Unit (DSU) equipment  
■ Integrated Access Devices (IADs)  
■ Wireless base stations, radio network  
controllers  
■ Routers  
■ Inverse Multiplexing for Asynchronous  
Transfer Mode (also known as ‘IMA’)  
■ Frame-relay access devices  
Notice: This document contains information on products in the sampling and initial production  
phases of development. The specifications are subject to change without notice. Verify with your  
local Intel sales office that you have the latest datasheet before finalizing a design.  
Document Number: 249544  
Revision Number: 004  
Revision Date: June 26, 2003  
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