February 2012
TM
UniFET
FDH50N50_F133 / FDA50N50
500V N-Channel MOSFET
Features
Description
•
•
•
•
•
•
48A, 500V, RDS(on) = 0.105Ω @VGS = 10 V
Low gate charge ( typical 105 nC)
Low Crss ( typical 45 pF)
Fast switching
These N-Channel enhancement mode power field effect transis-
tors are produced using Fairchild’s proprietary, planar stripe,
DMOS technology.
This advanced technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
cient switched mode power supplies and active power factor
correction.
100% avalanche tested
Improved dv/dt capability
D
{
z
ꢀ ꢁ
z
z
{
G
TO-247
TO-3PN
{
S
G
FDH Series
FDA Series
D
G D S
S
Absolute Maximum Ratings
Symbol
Parameter
FDH50N50_F133/FDA50N50
Unit
VDSS
Drain-Source Voltage
Drain Current
500
V
ID
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
48
30.8
A
A
(Note 1)
(Note 2)
IDM
Drain Current
- Pulsed
192
±20
1868
48
A
V
VGSS
EAS
IAR
Gate-Source voltage
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
(Note 1)
(Note 1)
(Note 3)
EAR
dv/dt
PD
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
62.5
20
mJ
V/ns
Power Dissipation
(TC = 25°C)
- Derate above 25°C
625
5
W
W/°C
TJ, TSTG
TL
Operating and Storage Temperature Range
-55 to +150
300
°C
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
°C
Thermal Characteristics
Symbol
Parameter
Min.
--
Max.
0.2
--
Unit
°C/W
°C/W
°C/W
RθJC
RθCS
RθJA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
0.24
--
Thermal Resistance, Junction-to-Ambient
40
©2012 Fairchild Semiconductor Corporation
FDH50N50_F133 / FDA50N50 Rev.C0
1
www.fairchildsemi.com