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FAN3121CMPX PDF预览

FAN3121CMPX

更新时间： 2024-02-21 19:20:30
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器MOSFET驱动器栅极驱动程序和接口接口集成电路栅极驱动
页数 文件大小 规格书
21页 1334K
描述
Single 9A High-Speed, Low-Side Gate Driver

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FAN3121CMPX 技术参数

是否无铅：不含铅生命周期：Active
包装说明：SOP, SOP8,.25Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.31.00.01
Factory Lead Time：1 week风险等级：1.39
Is Samacsys：N内置保护：UNDER VOLTAGE
高边驱动器：NO接口集成电路类型：BUFFER OR INVERTER BASED MOSFET DRIVER
JESD-30 代码：R-PDSO-G8JESD-609代码：e4
长度：5 mm湿度敏感等级：1
功能数量：1端子数量：8
最高工作温度：125 °C最低工作温度：-40 °C
输出电流流向：SOURCE AND SINK封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：12 V
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：MOSFET Drivers最大压摆率：0.9 mA
最大供电电压：18 V最小供电电压：4.5 V
标称供电电压：12 V表面贴装：YES
温度等级：AUTOMOTIVE端子面层：Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
断开时间：0.035 µs接通时间：0.035 µs
宽度：4 mmBase Number Matches：1

FAN3121CMPX 数据手册

 浏览型号FAN3121CMPX的Datasheet PDF文件第13页浏览型号FAN3121CMPX的Datasheet PDF文件第14页浏览型号FAN3121CMPX的Datasheet PDF文件第15页浏览型号FAN3121CMPX的Datasheet PDF文件第17页浏览型号FAN3121CMPX的Datasheet PDF文件第18页浏览型号FAN3121CMPX的Datasheet PDF文件第19页 
Thermal Guidelines  
Gate drivers used to switch MOSFETs and IGBTs at  
high frequencies can dissipate significant amounts of  
power. It is important to determine the driver power  
dissipation and the resulting junction temperature in the  
application to ensure that the part is operating within  
acceptable temperature limits.  
In a full-bridge synchronous rectifier application, shown  
in Figure 53, each FAN3122 drives parallel  
combination of two high-current MOSFETs, (such as  
FDMS8660S). The typical gate charge for each SR  
MOSFET is 70nC with VGS = VDD = 9V. At a switching  
frequency of 300kHz, the total power dissipation is:  
a
The total power dissipation in a gate driver is the sum of  
P
GATE = 2 • 70nC • 9V • 300kHz = 0.378W  
(5)  
(6)  
(7)  
two components, PGATE and PDYNAMIC  
:
PDYNAMIC = 2mA • 9V = 18mW  
PTOTAL = 0.396W  
PTOTAL = PGATE + PDYNAMIC  
(1)  
Gate Driving Loss: The most significant power loss  
results from supplying gate current (charge per unit  
time) to switch the load MOSFET on and off at the  
switching frequency. The power dissipation that  
results from driving a MOSFET at a specified gate-  
source voltage, VGS, with gate charge, QG, at  
switching frequency, fSW, is determined by:  
The SOIC-8 has  
characterization parameter of  
a
junction-to-board thermal  
ψJB  
= 42°C/W. In a  
system application, the localized temperature around  
the device is a function of the layout and construction of  
the PCB along with airflow across the surfaces. To  
ensure reliable operation, the maximum junction  
temperature of the device must be prevented from  
exceeding the maximum rating of 150°C; with 80%  
derating, TJ would be limited to 120°C. Rearranging  
Equation 4 determines the board temperature required  
to maintain the junction temperature below 120°C:  
PGATE = QG • VGS • fSW  
(2)  
Dynamic Pre-drive / Shoot-through Current: A  
power loss resulting from internal current  
consumption under dynamic operating conditions,  
including pin pull-up / pull-down resistors, can be  
obtained using the “IDD (No-Load) vs. Frequency”  
graphs in Typical Performance Characteristics to  
determine the current IDYNAMIC drawn from VDD  
under actual operating conditions:  
ψ
TB,MAX = TJ - PTOTAL  
•
(8)  
JB  
TB,MAX = 120°C – 0.396W • 42°C/W = 104°C (9)  
For comparison, replace the SOIC-8 used in the  
previous example with the 3x3mm MLP package with  
PDYNAMIC = IDYNAMIC • VDD  
(3)  
ψJB  
= 2.8°C/W. The 3x3mm MLP package can operate  
at a PCB temperature of 118°C, while maintaining the  
junction temperature below 120°C. This illustrates that  
the physically smaller MLP package with thermal pad  
offers a more conductive path to remove the heat from  
the driver. Consider tradeoffs between reducing overall  
circuit size with junction temperature reduction for  
increased reliability.  
Once the power dissipated in the driver is determined,  
the driver junction rise with respect to circuit board can  
be evaluated using the following thermal equation,  
ψJB  
assuming  
was determined for a similar thermal  
design (heat sinking and air flow):  
ψ
TJ = PTOTAL  
where:  
•
JB + TB  
(4)  
TJ = driver junction temperature;  
ψJB  
= (psi) thermal characterization parameter relating  
temperature rise to total power dissipation; and  
TB = board temperature in location as defined in  
the Thermal Characteristics table.  
© 2008 Fairchild Semiconductor Corporation  
FAN3121 / FAN3122 • Rev. 1.0.0  
www.fairchildsemi.com  
16  
1...13141516171819...21

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