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F271-AEA5-T-TR PDF预览

F271-AEA5-T-TR

更新时间: 2024-11-21 20:51:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 时钟微控制器外围集成电路
页数 文件大小 规格书
180页 1693K
描述
16-BIT, FLASH, 48MHz, MICROCONTROLLER, PQFP144, 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, TQFP-144

F271-AEA5-T-TR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, TQFP-144
针数:144Reach Compliance Code:not_compliant
HTS代码:8542.31.00.01风险等级:5.86
具有ADC:YES地址总线宽度:23
位大小:16CPU系列:ST10
最大时钟频率:8 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:16
JESD-30 代码:S-PQFP-G144长度:20 mm
湿度敏感等级:1I/O 线路数量:111
端子数量:144最高工作温度:105 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP144,.87SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):225
电源:5 V认证状态:Not Qualified
RAM(字节):12288ROM(单词):131072
ROM可编程性:FLASH座面最大高度:1.6 mm
速度:48 MHz子类别:Microcontrollers
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:20 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

F271-AEA5-T-TR 数据手册

 浏览型号F271-AEA5-T-TR的Datasheet PDF文件第2页浏览型号F271-AEA5-T-TR的Datasheet PDF文件第3页浏览型号F271-AEA5-T-TR的Datasheet PDF文件第4页浏览型号F271-AEA5-T-TR的Datasheet PDF文件第5页浏览型号F271-AEA5-T-TR的Datasheet PDF文件第6页浏览型号F271-AEA5-T-TR的Datasheet PDF文件第7页 
ST10F271B  
ST10F271E  
16-bit MCU with 128 Kbyte Flash memory and 8/12 Kbyte RAM  
Features  
16-bit CPU with DSP functions  
– 31.25ns instruction cycle time at 64MHz  
max CPU clock  
– Multiply/accumulate unit (MAC) 16 x 16-bit  
multiplication, 40-bit accumulator  
– Enhanced boolean bit manipulations  
– Single-cycle context switching support  
PQFP144 (28 x 28 x 3.4mm)  
(Plastic Quad Flat Package)  
TQFP144 (20 x 20 x 1.4mm)  
(Thin Quad Flat Package)  
On-chip memories  
A/D converter  
– 256 Kbyte Flash memory (32-bit fetch)  
– 24-channel 10-bit  
– Single voltage Flash memories with  
erase/program controller and 100K  
erasing/programming cycles.  
– 3 µs minimum conversion time  
Serial channels  
Two synch. / asynch. serial channels  
Two high-speed synchronous channels  
– One I2C standard interface  
– Up to 16 Mbyte linear address space for  
code and data (5 Mbytes with CAN or I2C)  
– 2 Kbyte internal RAM (IRAM)  
– 10/18 Kbyte extension RAM (XRAM)  
2 CAN 2.0B interfaces operating on 1 or 2 CAN  
– Programmable external bus configuration &  
characteristics for different address ranges  
busses (64 or 2x32 message, C-CAN version)  
Fail-safe protection  
– Five programmable chip-select signals  
– Hold-acknowledge bus arbitration support  
– Programmable watchdog timer  
– Oscillator watchdog  
Interrupt  
On-chip bootstrap loader  
– 8-channel peripheral event controller for  
single cycle interrupt driven data transfer  
Clock generation  
– On-chip PLL with 4 to 8 MHz oscillator  
– Direct or prescaled clock input  
– 16-priority-level interrupt system with 56  
sources, sampling rate down to 15.6ns  
Real time clock and 32 kHz on-chip oscillator  
Up to 111 general purpose I/O lines  
Timers  
Two multi-functional general purpose timer  
units with 5 timers  
– Individually programmable as input, output  
or special function  
Two 16-channel capture / compare units  
4-channel PWM unit + 4-channel XPWM  
– Programmable threshold (hysteresis)  
Idle, power down and stand-by modes  
Single voltage supply: 5V ±10%  
July 2006  
Rev 1  
1/180  
www.st.com  
1

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