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F272-BAG-T

更新时间: 2024-11-21 18:42:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 时钟微控制器外围集成电路
页数 文件大小 规格书
188页 1643K
描述
16-bit MCU with 256 Kbyte Flash memory and 12 Kbyte RAM

F272-BAG-T 技术参数

是否Rohs认证: 符合生命周期:Not Recommended
零件包装代码:QFP包装说明:LFQFP, QFP144,.87SQ,20
针数:144Reach Compliance Code:compliant
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
风险等级:5.47具有ADC:YES
地址总线宽度:24位大小:16
CPU系列:ST10最大时钟频率:40 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:16JESD-30 代码:S-PQFP-G144
JESD-609代码:e3长度:20 mm
湿度敏感等级:3I/O 线路数量:111
端子数量:144片上程序ROM宽度:32
最高工作温度:125 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP144,.87SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not QualifiedRAM(字节):20480
ROM(单词):65536ROM可编程性:FLASH
座面最大高度:1.6 mm速度:40 MHz
子类别:Microcontrollers最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:20 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

F272-BAG-T 数据手册

 浏览型号F272-BAG-T的Datasheet PDF文件第2页浏览型号F272-BAG-T的Datasheet PDF文件第3页浏览型号F272-BAG-T的Datasheet PDF文件第4页浏览型号F272-BAG-T的Datasheet PDF文件第5页浏览型号F272-BAG-T的Datasheet PDF文件第6页浏览型号F272-BAG-T的Datasheet PDF文件第7页 
ST10F272B  
ST10F272E  
16-bit MCU with 256 Kbyte Flash memory and 12/20 Kbyte RAM  
Datasheet  
production data  
Features  
16-bit CPU with DSP functions  
– 31.25ns instruction cycle time at 64MHz  
max CPU clock  
– Multiply/accumulate unit (MAC) 16 x 16-bit  
multiplication, 40-bit accumulator  
*$3*5,ꢀꢀꢀꢁꢁꢀ  
PQFP144 (28 x 28 x 3.4mm)  
(Plastic Quad Flat Package)  
LQFP144 (20 x 20 x 1.4mm)  
(Thin Quad Flat Package)  
– Enhanced boolean bit manipulations  
– Single-cycle context switching support  
A/D converter  
– 24-channel 10-bit  
On-chip memories  
– 3 μs minimum conversion time  
– 256 Kbyte Flash memory (32-bit fetch)  
– Single voltage Flash memories with  
erase/program controller and 100K  
erasing/programming cycles.  
Serial channels  
– Two synch. / asynch. serial channels  
– Two high-speed synchronous channels  
– One I2C standard interface  
– Up to 16 Mbyte linear address space for  
code and data (5 Mbytes with CAN or I2C)  
2 CAN 2.0B interfaces operating on 1 or 2 CAN  
busses (64 or 2x32 message, C-CAN version)  
– 2 Kbyte internal RAM (IRAM)  
– 10/18 Kbyte extension RAM (XRAM)  
Fail-safe protection  
– Programmable external busconfiguration&  
characteristics for different address ranges  
– Programmable watchdog timer  
– Oscillator watchdog  
– Five programmable chip-select signals  
– Hold-acknowledge bus arbitration support  
On-chip bootstrap loader  
Clock generation  
Interrupt  
– On-chip PLL with 4 to 8 MHz oscillator  
– Direct or prescaled clock input  
– 8-channel peripheral event controller for  
single cycle interrupt driven data transfer  
– 16-priority-level interrupt system with 56  
sources, sampling rate down to 15.6ns  
Real time clock and 32 kHz on-chip oscillator  
Up to 111 general purpose I/O lines  
Timers  
– Individually programmable as input, output  
or special function  
– Two multi-functional general purpose timer  
units with 5 timers  
– Programmable threshold (hysteresis)  
Idle, power down and stand-by modes  
Single voltage supply: 5V ±10%  
Two 16-channel capture / compare units  
4-channel PWM unit + 4-channel XPWM  
September 2013  
Doc ID 11917 Rev 5  
1/188  
This is information on a product in full production.  
www.st.com  
1

F272-BAG-T 替代型号

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