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EVAL-AD5767SD2Z PDF预览

EVAL-AD5767SD2Z

更新时间: 2024-12-01 01:20:31
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描述
16-Channel, 16-Bit/12-Bit Voltage Output denseDACs

EVAL-AD5767SD2Z 数据手册

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16-Channel, 16-Bit/12-Bit  
Voltage Output denseDACs  
AD5766/AD5767  
Data Sheet  
voltage as low as −20 V or a maximum output voltage of up to  
+14 V. Each of the 16 channels can be monitored with an  
integrated output voltage multiplexer.  
FEATURES  
Complete 16-channel, 12-bit/16-bit DACs  
8 software-programmable output ranges: −20 V to 0 V,  
−16 V to 0 V, −10 V to 0 V, −10 V to +6 V, −12 V to +14 V,  
−16 V to +10 V, ±± V and ±10 V  
Integrated DAC output buffers with ±20 mA output current  
capability  
4 mm × 4 mm WLCSP package and 40-lead LFCSP package  
Integrated reference buffers  
2 dither signal input pins  
The AD5766/AD5767 have integrated output buffers that can  
sink or source up to 20 mA. In conjunction with these buffers, a  
low frequency signal can be superimposed onto each DAC output  
via dedicated dither pins. These dedicated dither pins simplify  
the system design by reducing the number of external components  
required for a similar external implementation, like operational  
amplifiers or resistors. The reduction of external components  
makes the AD5766/AD5767 suitable for indium phosphide Mach  
Zehnder modulator (InP MZM) biasing applications.  
Channel monitoring multiplexer  
1.8 V logic compatibility  
Temperature range: −40°C to +10±°C  
The devices incorporate a power-on reset (POR) circuit that  
ensures that the DAC outputs are clamped to ground on power  
up and remain at this level until the output range of the DAC is  
configured. The outputs of all DACs are updated through register  
configuration, with the added functionality of user-selectable  
DAC channels to be simultaneously updated.  
APPLICATIONS  
Mach Zehnder modulator bias control  
Optical networking  
Instrumentation  
Industrial automation  
Data acquisition systems  
Analog output modules  
The AD5766/AD5767 use a versatile 4-wire serial interface that  
operates at clock rates of up to 50 MHz for write mode and is  
compatible with serial peripheral interface (SPI), QSPI™,  
MICROWIRE™, and DSP interface standards. The AD5766/  
AD5767 also contain a VLOGIC pin intended for 1.8 V/3.3 V/5 V  
logic.  
GENERAL DESCRIPTION  
The AD5766/AD5767 are 16-channel, 16-bit/12-bit, voltage output  
denseDAC® digital-to-analog converters (DACs).  
The DACs generate output voltage ranges from an external 2.5 V  
reference. Depending on the voltage range selected, the midpoint  
of the output span can be adjusted, allowing a minimum output  
The AD5766/AD5767 are available in a 4 mm × 4 mm WLCSP  
package and a 40-lead LFCSP package. The AD5766/AD5767  
operate at a temperature range of −40°C to +105°C.  
FUNCTIONAL BLOCK DIAGRAM  
V
AV  
AV  
DD  
REF  
CC  
V
0
OUT  
RANGE  
SET DAC  
16-TO-1  
MUX  
AD5766/AD5767  
MUX_OUT  
V
LOGIC  
V
15  
OUT  
n
n
n
DAC  
INPUT  
V
V
0
1
DAC 0  
DAC 1  
SDI  
OUT  
OUT  
INPUT  
REGISTER 0  
REGISTER 0  
SHIFT  
REGISTER  
AND  
CONTROL  
LOGIC  
SCLK  
SYNC  
SDO  
INPUT  
REGISTER 1  
DAC  
REGISTER 1  
RESET  
DGND  
n
INPUT  
REGISTER 15  
DAC  
REGISTER 15  
V
15  
DAC 15  
OUT  
AV  
AGND  
SS  
AGND  
N0  
N1  
Figure 1.  
Rev. C  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2017–2018 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 

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