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EPXA1F484C2 PDF预览

EPXA1F484C2

更新时间: 2024-11-11 15:31:55
品牌 Logo 应用领域
阿尔特拉 - ALTERA 输入元件可编程逻辑
页数 文件大小 规格书
16页 259K
描述
Loadable PLD, PBGA484, FINE LINE, BGA-484

EPXA1F484C2 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:FINE LINE, BGA-484针数:484
Reach Compliance Code:compliantECCN代码:3A001.A.7.A
HTS代码:8542.39.00.01风险等级:5.75
JESD-30 代码:S-PBGA-B484JESD-609代码:e0
长度:23 mm湿度敏感等级:3
专用输入次数:I/O 线路数量:186
端子数量:484最高工作温度:85 °C
最低工作温度:组织:0 DEDICATED INPUTS, 186 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):220
可编程逻辑类型:LOADABLE PLD认证状态:Not Qualified
座面最大高度:2.1 mm最大供电电压:1.89 V
最小供电电压:1.71 V标称供电电压:1.8 V
表面贴装:YES温度等级:OTHER
端子面层:TIN LEAD端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:23 mm
Base Number Matches:1

EPXA1F484C2 数据手册

 浏览型号EPXA1F484C2的Datasheet PDF文件第2页浏览型号EPXA1F484C2的Datasheet PDF文件第3页浏览型号EPXA1F484C2的Datasheet PDF文件第4页浏览型号EPXA1F484C2的Datasheet PDF文件第5页浏览型号EPXA1F484C2的Datasheet PDF文件第6页浏览型号EPXA1F484C2的Datasheet PDF文件第7页 
Excalibur Device Overview  
May 2002, ver. 2.0  
Data Sheet  
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Combination of a world-class RISC processor system with industry-  
leading programmable logic on a single device  
Industry-standard ARM922T32-bit RISC processor core operating  
at up to 200 MHz  
Features...  
ARMv4T instruction set with Thumb® extensions  
Memory management unit (MMU) included for real-time  
operating system (RTOS) support  
Harvard cache architecture with 64-way set associative separate  
8-Kbyte instruction and 8-Kbyte data caches  
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APEX20KE-like programmable logic architecture ranging from  
100,000 to 1,000,000 gates (see Table 1 on page 3)  
Advanced bus architecture based on advanced microcontroller bus  
architecture (AMBA) high-performance bus (AHB)  
Embedded programmable on-chip peripherals  
ETM9 embedded trace module to assist software debugging  
Flexible interrupt controller  
Universal asynchronous receiver/transmitter (UART)  
General-purpose timer  
Watchdog timer  
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Advanced memory support  
Internal single-port SRAM up to 256 Kbytes  
Internal dual-port SRAM up to 128 Kbytes  
Internal SDRAM controller  
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Single data-rate (SDR) and double data-rate (DDR) support  
Up to 512 Mbytes  
Data rates to 133 (266) MHz  
Expansion bus interface (EBI)  
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Compatible with industry-standard flash memory, SRAMs,  
and peripheral devices  
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Four devices, each up to 32 Mbytes  
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PLD configuration/reconfiguration possible via the embedded  
processor software  
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Altera Corporation  
1
DS-EXCARM-2.0  

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