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EPM1270T144C3N PDF预览

EPM1270T144C3N

更新时间: 2024-01-08 21:17:46
品牌 Logo 应用领域
英特尔 - INTEL 输入元件可编程逻辑
页数 文件大小 规格书
88页 982K
描述
Flash PLD, 6.2ns, 980-Cell, CMOS, PQFP144, 22 X 22 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144

EPM1270T144C3N 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:QFP
包装说明:22 X 22 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144针数:144
Reach Compliance Code:unknownECCN代码:3A991
HTS代码:8542.39.00.01风险等级:3.34
其他特性:IT CAN ALSO OPERATE AT 3.3V系统内可编程:YES
JESD-30 代码:S-PQFP-G144JESD-609代码:e3
JTAG BST:YES长度:20 mm
湿度敏感等级:3专用输入次数:
I/O 线路数量:116宏单元数:980
端子数量:144最高工作温度:85 °C
最低工作温度:组织:0 DEDICATED INPUTS, 116 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP144,.87SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:1.5/3.3,2.5/3.3 V
可编程逻辑类型:FLASH PLD传播延迟:6.2 ns
认证状态:Not Qualified座面最大高度:1.6 mm
子类别:Programmable Logic Devices最大供电电压:2.625 V
最小供电电压:2.375 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:20 mmBase Number Matches:1

EPM1270T144C3N 数据手册

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Chapter 5: DC and Switching Characteristics  
5–25  
Timing Model and Specifications  
Table 5–33. MAX II Maximum Output Clock Rate for I/O  
MAX II / MAX IIG  
MAX IIZ  
–3 Speed  
Grade  
–4 Speed  
Grade  
–5 Speed  
Grade  
–6 Speed  
Grade  
–7 Speed  
Grade  
8Speed  
I/O Standard  
3.3-V LVTTL  
Grade  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
304  
304  
220  
220  
200  
200  
150  
304  
304  
304  
220  
220  
200  
200  
150  
304  
304  
304  
220  
220  
200  
200  
150  
304  
304  
304  
220  
220  
200  
200  
150  
304  
304  
304  
220  
220  
200  
200  
150  
304  
304  
304  
220  
220  
200  
200  
150  
304  
3.3-V LVCMOS  
2.5-V LVTTL  
2.5-V LVCMOS  
1.8-V LVTTL  
1.8-V LVCMOS  
1.5-V LVCMOS  
3.3-V PCI  
JTAG Timing Specifications  
Figure 5–6 shows the timing waveforms for the JTAG signals.  
Figure 5–6. MAX II JTAG Timing Waveforms  
TMS  
TDI  
t
JCP  
t
t
JPH  
JPSU  
t
t
JCL  
JCH  
TCK  
TDO  
t
t
t
JPXZ  
JPZX  
JPCO  
t
t
JSSU  
JSH  
Signal  
to be  
Captured  
t
t
t
JSXZ  
JSZX  
JSCO  
Signal  
to be  
Driven  
Table 5–34 shows the JTAG Timing parameters and values for MAX II devices.  
Table 5–34. MAX II JTAG Timing Parameters (Part 1 of 2)  
Symbol  
JCP (1)  
Parameter  
TCKclock period for VCCIO1 = 3.3 V  
TCKclock period for VCCIO1 = 2.5 V  
TCKclock period for VCCIO1 = 1.8 V  
TCKclock period for VCCIO1 = 1.5 V  
TCKclock high time  
Min  
55.5  
62.5  
100  
143  
20  
Max  
Unit  
ns  
t
ns  
ns  
ns  
tJCH  
tJCL  
ns  
TCK clock low time  
20  
ns  
© August 2009 Altera Corporation  
MAX II Device Handbook  

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