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EPF10K20RC208-3N PDF预览

EPF10K20RC208-3N

更新时间: 2024-01-04 10:10:59
品牌 Logo 应用领域
阿尔特拉 - ALTERA 时钟LTE输入元件可编程逻辑
页数 文件大小 规格书
128页 637K
描述
Loadable PLD, 0.5ns, CMOS, PQFP208, RQFP-208

EPF10K20RC208-3N 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:HFQFP, HQFP208,1.2SQ,20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:7.78其他特性:1152 LOGIC ELEMENTS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
最大时钟频率:71.43 MHzJESD-30 代码:S-PQFP-G208
JESD-609代码:e3长度:28 mm
湿度敏感等级:3专用输入次数:4
I/O 线路数量:147输入次数:147
逻辑单元数量:1152输出次数:147
端子数量:208最高工作温度:70 °C
最低工作温度:组织:4 DEDICATED INPUTS, 147 I/O
输出函数:REGISTERED封装主体材料:PLASTIC/EPOXY
封装代码:HFQFP封装等效代码:HQFP208,1.2SQ,20
封装形状:SQUARE封装形式:FLATPACK, HEAT SINK/SLUG, FINE PITCH
峰值回流温度(摄氏度):245电源:3.3/5 V
可编程逻辑类型:LOADABLE PLD传播延迟:0.5 ns
认证状态:Not Qualified座面最大高度:4.1 mm
子类别:Field Programmable Gate Arrays最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:28 mmBase Number Matches:1

EPF10K20RC208-3N 数据手册

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FLEX 10K Embedded Programmable Logic Device Family Data Sheet  
The FLEX 10K architecture is similar to that of embedded gate arrays, the  
fastest-growing segment of the gate array market. As with standard gate  
arrays, embedded gate arrays implement general logic in a conventional  
“sea-of-gates” architecture. In addition, embedded gate arrays have  
dedicated die areas for implementing large, specialized functions. By  
embedding functions in silicon, embedded gate arrays provide reduced  
die area and increased speed compared to standard gate arrays. However,  
embedded megafunctions typically cannot be customized, limiting the  
designer’s options. In contrast, FLEX 10K devices are programmable,  
providing the designer with full control over embedded megafunctions  
and general logic while facilitating iterative design changes during  
debugging.  
Each FLEX 10K device contains an embedded array and a logic array. The  
embedded array is used to implement a variety of memory functions or  
complex logic functions, such as digital signal processing (DSP),  
microcontroller, wide-data-path manipulation, and data-transformation  
functions. The logic array performs the same function as the sea-of-gates  
in the gate array: it is used to implement general logic, such as counters,  
adders, state machines, and multiplexers. The combination of embedded  
and logic arrays provides the high performance and high density of  
embedded gate arrays, enabling designers to implement an entire system  
on a single device.  
FLEX 10K devices are configured at system power-up with data stored in  
an Altera serial configuration device or provided by a system controller.  
Altera offers the EPC1, EPC2, EPC16, and EPC1441 configuration devices,  
which configure FLEX 10K devices via a serial data stream. Configuration  
data can also be downloaded from system RAM or from Altera’s  
BitBlasterTM serial download cable or ByteBlasterMVTM parallel port  
download cable. After a FLEX 10K device has been configured, it can be  
reconfigured in-circuit by resetting the device and loading new data.  
Because reconfiguration requires less than 320 ms, real-time changes can  
be made during system operation.  
FLEX 10K devices contain an optimized interface that permits  
microprocessors to configure FLEX 10K devices serially or in parallel, and  
synchronously or asynchronously. The interface also enables  
microprocessors to treat a FLEX 10K device as memory and configure the  
device by writing to a virtual memory location, making it very easy for the  
designer to reconfigure the device.  
6
Altera Corporation  

EPF10K20RC208-3N 替代型号

型号 品牌 替代类型 描述 数据表
EPF10K20RI208-4 ALTERA

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Loadable PLD, 0.6ns, CMOS, PQFP208, RQFP-208
EPF10K20RC208-4N ALTERA

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